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authorAndrew Waterman <waterman@cs.berkeley.edu>2016-06-01 17:01:57 -0700
committerAndrew Waterman <waterman@cs.berkeley.edu>2016-06-01 17:03:26 -0700
commit771c1163d397cd08e1974869f15b2e0c2d394602 (patch)
tree08b5fd8ed054fd7ad42df9f5e176cbc6b49338a9 /machine
parentf70ee5576a07d455bdcc5275b7fc9d471090bf64 (diff)
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Clear IPIs using MMIO, not mip CSR
Diffstat (limited to 'machine')
-rw-r--r--machine/configstring.c3
-rw-r--r--machine/encoding.h32
-rw-r--r--machine/minit.c5
-rw-r--r--machine/mtrap.c2
4 files changed, 41 insertions, 1 deletions
diff --git a/machine/configstring.c b/machine/configstring.c
index b47d067..535250b 100644
--- a/machine/configstring.c
+++ b/machine/configstring.c
@@ -1,6 +1,7 @@
#include "configstring.h"
#include "encoding.h"
#include "mtrap.h"
+#include "atomic.h"
#include <stdio.h>
static void query_mem(const char* config_string)
@@ -74,6 +75,8 @@ static void query_harts(const char* config_string)
snprintf(buf, sizeof buf, "core{%d{%d{timecmp", core, hart);
res = query_config_string(config_string, buf);
assert(res.start);
+
+ mb();
hls->timecmp = (void*)(uintptr_t)get_uint(res);
num_harts++;
diff --git a/machine/encoding.h b/machine/encoding.h
index bdba5f2..1d5fb0d 100644
--- a/machine/encoding.h
+++ b/machine/encoding.h
@@ -33,6 +33,29 @@
#define SSTATUS32_SD 0x80000000
#define SSTATUS64_SD 0x8000000000000000
+#define DCSR_XDEBUGVER (3<<30)
+#define DCSR_NDRESET (1<<29)
+#define DCSR_FULLRESET (1<<28)
+#define DCSR_HWBPCOUNT (0xfff<<16)
+#define DCSR_EBREAKM (1<<15)
+#define DCSR_EBREAKH (1<<14)
+#define DCSR_EBREAKS (1<<13)
+#define DCSR_EBREAKU (1<<12)
+#define DCSR_STOPCYCLE (1<<10)
+#define DCSR_STOPTIME (1<<9)
+#define DCSR_CAUSE (7<<6)
+#define DCSR_DEBUGINT (1<<5)
+#define DCSR_HALT (1<<3)
+#define DCSR_STEP (1<<2)
+#define DCSR_PRV (3<<0)
+
+#define DCSR_CAUSE_NONE 0
+#define DCSR_CAUSE_SWBP 1
+#define DCSR_CAUSE_HWBP 2
+#define DCSR_CAUSE_DEBUGINT 3
+#define DCSR_CAUSE_STEP 4
+#define DCSR_CAUSE_HALT 5
+
#define MIP_SSIP (1 << IRQ_S_SOFT)
#define MIP_HSIP (1 << IRQ_H_SOFT)
#define MIP_MSIP (1 << IRQ_M_SOFT)
@@ -363,6 +386,8 @@
#define MASK_HRET 0xffffffff
#define MATCH_MRET 0x30200073
#define MASK_MRET 0xffffffff
+#define MATCH_DRET 0x7b200073
+#define MASK_DRET 0xffffffff
#define MATCH_SFENCE_VM 0x10400073
#define MASK_SFENCE_VM 0xfff07fff
#define MATCH_WFI 0x10500073
@@ -672,6 +697,9 @@
#define CSR_MSCYCLE_DELTA 0x704
#define CSR_MSTIME_DELTA 0x705
#define CSR_MSINSTRET_DELTA 0x706
+#define CSR_DCSR 0x7b0
+#define CSR_DPC 0x7b1
+#define CSR_DSCRATCH 0x7b2
#define CSR_MCYCLE 0xf00
#define CSR_MTIME 0xf01
#define CSR_MINSTRET 0xf02
@@ -799,6 +827,7 @@ DECLARE_INSN(uret, MATCH_URET, MASK_URET)
DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
DECLARE_INSN(hret, MATCH_HRET, MASK_HRET)
DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
+DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
@@ -974,6 +1003,9 @@ DECLARE_CSR(muinstret_delta, CSR_MUINSTRET_DELTA)
DECLARE_CSR(mscycle_delta, CSR_MSCYCLE_DELTA)
DECLARE_CSR(mstime_delta, CSR_MSTIME_DELTA)
DECLARE_CSR(msinstret_delta, CSR_MSINSTRET_DELTA)
+DECLARE_CSR(dcsr, CSR_DCSR)
+DECLARE_CSR(dpc, CSR_DPC)
+DECLARE_CSR(dscratch, CSR_DSCRATCH)
DECLARE_CSR(mcycle, CSR_MCYCLE)
DECLARE_CSR(mtime, CSR_MTIME)
DECLARE_CSR(minstret, CSR_MINSTRET)
diff --git a/machine/minit.c b/machine/minit.c
index f2bc0cf..609eb3a 100644
--- a/machine/minit.c
+++ b/machine/minit.c
@@ -100,6 +100,10 @@ static void plic_init()
static void hart_plic_init()
{
+ // clear pending interrupts
+ HLS()->ipi = 0;
+ write_csr(mip, 0);
+
if (!plic_ndevs)
return;
@@ -128,6 +132,7 @@ void init_other_hart()
// wait until hart 0 discovers us
while (*(uint64_t * volatile *)&HLS()->timecmp == NULL)
;
+ mb();
hart_plic_init();
boot_other_hart();
diff --git a/machine/mtrap.c b/machine/mtrap.c
index 9560948..a27908c 100644
--- a/machine/mtrap.c
+++ b/machine/mtrap.c
@@ -162,7 +162,7 @@ static uintptr_t mcall_set_timer(uint64_t when)
void software_interrupt()
{
- clear_csr(mip, MIP_MSIP);
+ *HLS()->ipi = 0;
mb();
int ipi_pending = atomic_swap(&HLS()->mipi_pending, 0);