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author | Palmer Dabbelt <palmer@dabbelt.com> | 2018-07-11 01:24:04 -0700 |
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committer | GitHub <noreply@github.com> | 2018-07-11 01:24:04 -0700 |
commit | 3434bc18aa962b69934b68cf811ba00908a50ca9 (patch) | |
tree | 6820cb6b0b2fb1a92a2d1f6d8a3d265e220c7279 /machine | |
parent | 16476bd8219f58417a401ea0a720d9588d1d8ebc (diff) | |
parent | 9ecbd23d6205a7e18ba17a847d49d32993c97421 (diff) | |
download | riscv-pk-3434bc18aa962b69934b68cf811ba00908a50ca9.zip riscv-pk-3434bc18aa962b69934b68cf811ba00908a50ca9.tar.gz riscv-pk-3434bc18aa962b69934b68cf811ba00908a50ca9.tar.bz2 |
Merge pull request #103 from zongbox/comment
Correct the comment of timer interrupt
Diffstat (limited to 'machine')
-rw-r--r-- | machine/mentry.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/machine/mentry.S b/machine/mentry.S index 6746f98..ede40bb 100644 --- a/machine/mentry.S +++ b/machine/mentry.S @@ -48,7 +48,7 @@ trap_vector: li a0, IRQ_M_TIMER * 2 bne a0, a1, 1f - # Yes. Simply clear MSIE and raise SSIP. + # Yes. Simply clear MTIE and raise STIP. li a0, MIP_MTIP csrc mie, a0 li a0, MIP_STIP |