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author | Andrew Waterman <andrew@sifive.com> | 2019-12-06 15:27:42 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2019-12-06 15:28:37 -0800 |
commit | 103f61c8a0204e0ad4e2a2dc4c0e9993eb7ef28d (patch) | |
tree | 1361efe65d7ae64c233f2276ce03c19fb2a49089 /machine/fp_asm.S | |
parent | 14e87d2dd250b0efb5e9fb19ab279ccf1ccbdbd7 (diff) | |
download | riscv-pk-103f61c8a0204e0ad4e2a2dc4c0e9993eb7ef28d.zip riscv-pk-103f61c8a0204e0ad4e2a2dc4c0e9993eb7ef28d.tar.gz riscv-pk-103f61c8a0204e0ad4e2a2dc4c0e9993eb7ef28d.tar.bz2 |
Only prohibit float32-only when FP emulation is enabled
Diffstat (limited to 'machine/fp_asm.S')
-rw-r--r-- | machine/fp_asm.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/machine/fp_asm.S b/machine/fp_asm.S index cdbb151..b449359 100644 --- a/machine/fp_asm.S +++ b/machine/fp_asm.S @@ -2,10 +2,6 @@ #ifdef __riscv_flen -#if __riscv_flen != 64 -# error single-float only is not supported -#endif - #define get_f32(which) fmv.x.s a0, which; jr t0 #define put_f32(which) fmv.s.x which, a0; jr t0 #if __riscv_xlen == 64 @@ -88,7 +84,9 @@ put_f32(f29) put_f32(f30) put_f32(f31) - + + #if __riscv_flen > 32 + .text .globl get_f64_reg get_f64_reg: @@ -162,3 +160,5 @@ put_f64(f31) #endif + +#endif |