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author | Andrew Waterman <andrew@sifive.com> | 2024-05-22 19:56:32 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2024-05-22 19:56:32 -0700 |
commit | 4f3debe4d04f56d31089c1c716a27e2d5245e9a1 (patch) | |
tree | 4b4820c2017b80403cb94c3337e7c1173a8d874e | |
parent | 54e2005dc8658bf7bbec52ac54fe4712f7b4362a (diff) | |
download | riscv-pk-4f3debe4d04f56d31089c1c716a27e2d5245e9a1.zip riscv-pk-4f3debe4d04f56d31089c1c716a27e2d5245e9a1.tar.gz riscv-pk-4f3debe4d04f56d31089c1c716a27e2d5245e9a1.tar.bz2 |
Don't require software check exceptions be delegable
-rw-r--r-- | machine/minit.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/machine/minit.c b/machine/minit.c index 55f50cb..cee11da 100644 --- a/machine/minit.c +++ b/machine/minit.c @@ -73,19 +73,21 @@ static void delegate_traps() return; uintptr_t interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP; - uintptr_t exceptions = + uintptr_t mandatorily_delegable_exceptions = (1U << CAUSE_MISALIGNED_FETCH) | (1U << CAUSE_FETCH_PAGE_FAULT) | (1U << CAUSE_BREAKPOINT) | (1U << CAUSE_LOAD_PAGE_FAULT) | (1U << CAUSE_STORE_PAGE_FAULT) | - (1U << CAUSE_USER_ECALL) | + (1U << CAUSE_USER_ECALL); + uintptr_t exceptions = + mandatorily_delegable_exceptions | (1U << CAUSE_SOFTWARE_CHECK_FAULT); write_csr(mideleg, interrupts); write_csr(medeleg, exceptions); assert((read_csr(mideleg) & interrupts) == interrupts); - assert(read_csr(medeleg) == exceptions); + assert((~read_csr(medeleg) & mandatorily_delegable_exceptions) == 0); } static void fp_init() |