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| author | Andrew Waterman <andrew@sifive.com> | 2021-08-04 16:03:08 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-08-04 16:03:08 -0700 |
| commit | 01c83839fd19b6ab68ae731f6ee9ceae33f581ba (patch) | |
| tree | a42c40f591aa6099eaefa0b7291cecc3333b5f8b | |
| parent | ae7348b246bc091f5af844a7bdaf1044cac90635 (diff) | |
| download | riscv-pk-01c83839fd19b6ab68ae731f6ee9ceae33f581ba.zip riscv-pk-01c83839fd19b6ab68ae731f6ee9ceae33f581ba.tar.gz riscv-pk-01c83839fd19b6ab68ae731f6ee9ceae33f581ba.tar.bz2 | |
Revert "machine: correct some additional cases of UB (#246)"
This reverts commit e8d15a489fa76612707ff9e99feb0fb36acc9f14.
| -rw-r--r-- | machine/fp_emulation.h | 22 |
1 files changed, 4 insertions, 18 deletions
diff --git a/machine/fp_emulation.h b/machine/fp_emulation.h index eeafafb..1352ca3 100644 --- a/machine/fp_emulation.h +++ b/machine/fp_emulation.h @@ -47,22 +47,14 @@ else tp = GET_RM(insn); \ asm volatile ("":"+r"(tp)); }) # define softfloat_raiseFlags(which) set_csr(fflags, which) -# define softfloat_roundingMode ({ \ - uintptr_t __tp; \ - __asm__("mv %0, tp" : "=r"(__tp)); \ - __tp; \ -}) +# define softfloat_roundingMode ({ register int tp asm("tp"); tp; }) # define SET_FS_DIRTY() ((void) 0) #else # define GET_F64_REG(insn, pos, regs) (*(int64_t*)((void*)((regs) + 32) + (SHIFT_RIGHT(insn, (pos)-3) & 0xf8))) # define SET_F64_REG(insn, pos, regs, val) (GET_F64_REG(insn, pos, regs) = (val)) # define GET_F32_REG(insn, pos, regs) (*(int32_t*)&GET_F64_REG(insn, pos, regs)) # define SET_F32_REG(insn, pos, regs, val) (GET_F32_REG(insn, pos, regs) = (val)) -# define GET_FCSR() ({ \ - uintptr_t __tp; \ - __asm__("mv %0, tp" : "=r"(__tp)); \ - __tp & 0xff; \ -}) +# define GET_FCSR() ({ register int tp asm("tp"); tp & 0xFF; }) # define SET_FCSR(value) ({ asm volatile("add tp, x0, %0" :: "rI"((value) & 0xFF)); SET_FS_DIRTY(); }) # define GET_FRM() (GET_FCSR() >> 5) # define SET_FRM(value) SET_FCSR(GET_FFLAGS() | ((value) << 5)) @@ -70,19 +62,13 @@ # define SET_FFLAGS(value) SET_FCSR((GET_FRM() << 5) | ((value) & 0x1F)) # define SETUP_STATIC_ROUNDING(insn) ({ \ - register uintptr_t tp asm("tp"); \ - __asm__("mv %0, tp" : "=r"(tp)); \ - tp &= 0xff; \ + register int tp asm("tp"); tp &= 0xFF; \ if (likely(((insn) & MASK_FUNCT3) == MASK_FUNCT3)) tp |= tp << 8; \ else if (GET_RM(insn) > 4) return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); \ else tp |= GET_RM(insn) << 13; \ asm volatile ("":"+r"(tp)); }) # define softfloat_raiseFlags(which) ({ asm volatile ("or tp, tp, %0" :: "rI"(which)); }) -# define softfloat_roundingMode ({ \ - uintptr_t __tp; \ - __asm__("mv %0, tp" : "=r"(__tp)); \ - __tp >> 13; \ -}) +# define softfloat_roundingMode ({ register int tp asm("tp"); tp >> 13; }) # define SET_FS_DIRTY() set_csr(mstatus, MSTATUS_FS) #endif |