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| author | Peter Collingbourne <pcc@google.com> | 2024-07-30 18:03:33 -0700 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2024-08-25 12:39:25 +0000 |
| commit | 7eb9a48f2d53a773d822b7a2b93f53c09acb48d9 (patch) | |
| tree | 43c941b29ec842344f06e63ddbe80cd5ed06fd0c /src | |
| parent | d3f50ea9145aa6cbe9232ab29736aebbd60763cd (diff) | |
| download | riscv-openocd-7eb9a48f2d53a773d822b7a2b93f53c09acb48d9.zip riscv-openocd-7eb9a48f2d53a773d822b7a2b93f53c09acb48d9.tar.gz riscv-openocd-7eb9a48f2d53a773d822b7a2b93f53c09acb48d9.tar.bz2 | |
arm_adi_v5: Also clear sticky overrun bit on init
Some targets start up with the sticky overrun bit set. On such targets
we need to clear it in order to avoid subsequent incorrect reads.
Change-Id: I3e939a9e092de6fcea9494d3179a3386aa1701d2
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8420
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/arm_adi_v5.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 8a97d7a..3a5afc6 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -795,11 +795,12 @@ int dap_dp_init(struct adiv5_dap *dap) dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ; /* - * This write operation clears the sticky error bit in jtag mode only and - * is ignored in swd mode. It also powers-up system and debug domains in - * both jtag and swd modes, if not done before. + * This write operation clears the sticky error and overrun bits in jtag + * mode only and is ignored in swd mode. It also powers-up system and + * debug domains in both jtag and swd modes, if not done before. */ - retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat | SSTICKYERR); + retval = dap_queue_dp_write(dap, DP_CTRL_STAT, + dap->dp_ctrl_stat | SSTICKYERR | SSTICKYORUN); if (retval != ERROR_OK) return retval; |