diff options
| author | Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> | 2025-01-13 16:29:56 +0300 |
|---|---|---|
| committer | Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> | 2025-01-24 22:15:31 +0300 |
| commit | 8513d6edcc13071cc157371b32876ab92f775f8c (patch) | |
| tree | 93a0186dc0a1eee99fc9ca92d57245c3dd2650ff /git-hooks/commit-msg | |
| parent | eb9ba216e199a3a93f976246823c7a9653ad5064 (diff) | |
| download | riscv-openocd-8513d6edcc13071cc157371b32876ab92f775f8c.zip riscv-openocd-8513d6edcc13071cc157371b32876ab92f775f8c.tar.gz riscv-openocd-8513d6edcc13071cc157371b32876ab92f775f8c.tar.bz2 | |
target/riscv: set VLENB/MTOPI/MTOPEI existence on 0.11 targets
commit 5f45b5bd73566028ee36c146803232b3dce77c52 ("target/riscv: reg cache
entry is initialized before access") introduced an assertion in
`riscv_reg_impl_gdb_regno_exist()`.
Link: https://github.com/riscv-collab/riscv-openocd/blob/f82c5a7c048eb70fdc4dff6f53002fa1d3a1bda5/src/target/riscv/riscv_reg.c#L385-L389
This assertion fails on RISC-V Debug Spec. 0.11 targets.
The commit is intended to fix this.
Change-Id: I20b56df1517f4071f4b6e39c83178a29a9cf95b0
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Diffstat (limited to 'git-hooks/commit-msg')
0 files changed, 0 insertions, 0 deletions