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| author | Farid Khaydari <f.khaydari@syntacore.com> | 2025-01-28 15:08:47 +0300 |
|---|---|---|
| committer | Farid Khaydari <f.khaydari@syntacore.com> | 2025-02-21 13:44:47 +0300 |
| commit | 7335759845431572047c4712a46f9f33c7a2c1d5 (patch) | |
| tree | d132dc31806842128c96a0ee69336cb9ddcebe99 /contrib/rpc_examples/ocd_rpc_example.py | |
| parent | 56b7830d653002411db94cbbf6f35471fb46936d (diff) | |
| download | riscv-openocd-7335759845431572047c4712a46f9f33c7a2c1d5.zip riscv-openocd-7335759845431572047c4712a46f9f33c7a2c1d5.tar.gz riscv-openocd-7335759845431572047c4712a46f9f33c7a2c1d5.tar.bz2 | |
target/riscv: set appropriate memory access result codes
Set appropriate memory access result codes
Checkpatch-ignore: MACRO_ARG_PRECEDENCE, MULTISTATEMENT_MACRO_USE_DO_WHILE
Checkpatch-ignore: TRAILING_SEMICOLON
Change-Id: Ib73b5a041e5f15aef150b80fdd45f107de19d3a6
Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
Diffstat (limited to 'contrib/rpc_examples/ocd_rpc_example.py')
0 files changed, 0 insertions, 0 deletions