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| author | Farid Khaydari <f.khaydari@syntacore.com> | 2025-01-28 15:08:25 +0300 |
|---|---|---|
| committer | Farid Khaydari <f.khaydari@syntacore.com> | 2025-02-03 15:17:20 +0300 |
| commit | 0bd8aaa46cfae5342e9c51a2de0dd4f6b4d31943 (patch) | |
| tree | 94c7fb2c0a9d2bafc32dba2f9f5b8692b7859529 /contrib/rpc_examples/ocd_rpc_example.py | |
| parent | 5de7310881c18a50797e8d96cf6d3f3aeb2aa4d0 (diff) | |
| download | riscv-openocd-0bd8aaa46cfae5342e9c51a2de0dd4f6b4d31943.zip riscv-openocd-0bd8aaa46cfae5342e9c51a2de0dd4f6b4d31943.tar.gz riscv-openocd-0bd8aaa46cfae5342e9c51a2de0dd4f6b4d31943.tar.bz2 | |
target/riscv: refactored memory access result codes
Slightly refactored memory access result codes:
* Changed enum formatting
* Changed status handlers to decrease boilerplate
Checkpatch-ignore: MACRO_ARG_PRECEDENCE, MULTISTATEMENT_MACRO_USE_DO_WHILE
Checkpatch-ignore: TRAILING_SEMICOLON
Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
Diffstat (limited to 'contrib/rpc_examples/ocd_rpc_example.py')
0 files changed, 0 insertions, 0 deletions