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| author | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 17:38:10 +0530 |
|---|---|---|
| committer | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 20:11:59 +0530 |
| commit | 88085a5f6bbb74cb434ff62bacc5912f41fb913b (patch) | |
| tree | 64cade26276a85e63550a6b66461e39dfe075235 /rv32_c | |
| parent | 56147c766f68cf19f826fde0e4897e988d658bcf (diff) | |
| download | riscv-opcodes-88085a5f6bbb74cb434ff62bacc5912f41fb913b.zip riscv-opcodes-88085a5f6bbb74cb434ff62bacc5912f41fb913b.tar.gz riscv-opcodes-88085a5f6bbb74cb434ff62bacc5912f41fb913b.tar.bz2 | |
migrate C-extension opcodes (major)
- the previous opcodes used ignore to define immediate fields instead of assigning arg names to it. This is made it difficult to parse and decode the instructions.
- this commit assigns unique names to immediate fields in accordance to what has been done elsewhere. Note these names hold no correspondence to the spec and are defined here purely to ease decoding
- This commit also splits the instructions which depend on F/D/Q in to their respective files as per new naming convention
- c.nop encoding has been changed to include hints as well.
Diffstat (limited to 'rv32_c')
| -rw-r--r-- | rv32_c | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -0,0 +1,5 @@ +# quadrant 1 +c.jal c_imm12 1..0=1 15..13=1 +$pseudo_op rv64_c::c.srli c.srli rd_rs1_p c_nzuimm5 1..0=1 15..13=4 12..10=0 +$pseudo_op rv64_c::c.srai c.srai rd_rs1_p c_nzuimm5 1..0=1 15..13=4 12..10=1 +$pseudo_op rv64_c::c.slli c.slli rd_rs1_n0 c_nzuimm6lo 1..0=2 15..12=0 |