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| author | Andrew Waterman <andrew@sifive.com> | 2023-11-24 22:43:57 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-24 22:43:57 -0800 |
| commit | ef0c296be1c4cec4bf1c4636acd810eb9a8d136c (patch) | |
| tree | 7f65d418be4d5a5ccffdee42ca967449a3aa3f7b | |
| parent | d5755c9d380f8ab75a98ee9901019ab3f52259dc (diff) | |
| parent | 55fdd57dd17545871f682fc45c35036ee32e9f89 (diff) | |
| download | riscv-opcodes-ef0c296be1c4cec4bf1c4636acd810eb9a8d136c.zip riscv-opcodes-ef0c296be1c4cec4bf1c4636acd810eb9a8d136c.tar.gz riscv-opcodes-ef0c296be1c4cec4bf1c4636acd810eb9a8d136c.tar.bz2 | |
Merge pull request #209 from ved-rivos/zicfiss
Add CSR fields and SSP CSR introduced by unratified Zicfiss extension
| -rw-r--r-- | csrs.csv | 1 | ||||
| -rw-r--r-- | encoding.h | 3 |
2 files changed, 4 insertions, 0 deletions
@@ -5,6 +5,7 @@ 0x009, "vxsat" 0x00A, "vxrm" 0x00F, "vcsr" +0x011, "ssp" 0x015, "seed" 0x017, "jvt" 0xC00, "cycle" @@ -148,6 +148,7 @@ #define SIP_STIP MIP_STIP #define MENVCFG_FIOM 0x00000001 +#define MENVCFG_SSE 0x00000008 #define MENVCFG_CBIE 0x00000030 #define MENVCFG_CBCFE 0x00000040 #define MENVCFG_CBZE 0x00000080 @@ -186,6 +187,7 @@ #define MHPMEVENTH_OF 0x80000000 #define HENVCFG_FIOM 0x00000001 +#define HENVCFG_SSE 0x00000008 #define HENVCFG_CBIE 0x00000030 #define HENVCFG_CBCFE 0x00000040 #define HENVCFG_CBZE 0x00000080 @@ -221,6 +223,7 @@ #define HSTATEENH_SSTATEEN 0x80000000 #define SENVCFG_FIOM 0x00000001 +#define SENVCFG_SSE 0x00000008 #define SENVCFG_CBIE 0x00000030 #define SENVCFG_CBCFE 0x00000040 #define SENVCFG_CBZE 0x00000080 |