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| author | Charlie Jenkins <charlie@rivosinc.com> | 2023-09-15 22:19:46 -0400 |
|---|---|---|
| committer | Charlie Jenkins <charlie@rivosinc.com> | 2023-09-15 22:23:10 -0400 |
| commit | 87598447e30f77e7ddf0a13f7726394a228dacec (patch) | |
| tree | e6e194a52d9ebdb6b491e4c77554d585f8d635e1 | |
| parent | d752f193cec46cfd33300abba2a3a0d020c36755 (diff) | |
| download | riscv-opcodes-87598447e30f77e7ddf0a13f7726394a228dacec.zip riscv-opcodes-87598447e30f77e7ddf0a13f7726394a228dacec.tar.gz riscv-opcodes-87598447e30f77e7ddf0a13f7726394a228dacec.tar.bz2 | |
C.ADDIW cannot have an rd of 0
The code point of rd=0 in C.ADDIW is restricted.
Fix formatting while in these files.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
| -rw-r--r-- | rv64_c | 6 | ||||
| -rw-r--r-- | unratified/rv128_c | 5 |
2 files changed, 4 insertions, 7 deletions
@@ -3,15 +3,13 @@ c.ld rd_p rs1_p c_uimm8lo c_uimm8hi 1..0=0 15..13=3 c.sd rs1_p rs2_p c_uimm8hi c_uimm8lo 1..0=0 15..13=7 #quadrant 1 -c.addiw rd_rs1 c_imm6lo c_imm6hi 1..0=1 15..13=1 +c.addiw rd_rs1_n0 c_imm6lo c_imm6hi 1..0=1 15..13=1 c.srli rd_rs1_p c_nzuimm6lo c_nzuimm6hi 1..0=1 15..13=4 11..10=0 c.srai rd_rs1_p c_nzuimm6lo c_nzuimm6hi 1..0=1 15..13=4 11..10=1 c.subw rd_rs1_p rs2_p 1..0=1 15..13=4 12..10=0b111 6..5=0 c.addw rd_rs1_p rs2_p 1..0=1 15..13=4 12..10=0b111 6..5=1 - #quadrant 2 c.slli rd_rs1_n0 c_nzuimm6hi c_nzuimm6lo 1..0=2 15..13=0 c.ldsp rd_n0 c_uimm9sphi c_uimm9splo 1..0=2 15..13=3 -c.sdsp c_rs2 c_uimm9sp_s 1..0=2 15..13=7 - +c.sdsp c_rs2 c_uimm9sp_s 1..0=2 15..13=7 diff --git a/unratified/rv128_c b/unratified/rv128_c index beb6cd6..9d38a0c 100644 --- a/unratified/rv128_c +++ b/unratified/rv128_c @@ -5,11 +5,10 @@ c.sq rs1_p rs2_p c_uimm9hi c_uimm9lo 1..0=0 15..13=5 c.sd rs1_p rs2_p c_uimm8hi c_uimm8lo 1..0=0 15..13=7 #quadrant 1 -c.addiw rd_rs1 c_imm6lo c_imm6hi 1..0=1 15..13=1 +c.addiw rd_rs1_n0 c_imm6lo c_imm6hi 1..0=1 15..13=1 #quadrant 2 c.lqsp rd c_uimm10sphi c_uimm10splo 1..0=2 15..13=1 -c.ldsp rd_n0 c_uimm9sphi c_uimm9splo 1..0=2 15..13=3 +c.ldsp rd_n0 c_uimm9sphi c_uimm9splo 1..0=2 15..13=3 c.sqsp c_rs2 c_uimm10sp_s 1..0=2 15..13=5 c.sdsp c_rs2 c_uimm9sp_s 1..0=2 15..13=7 - |