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| author | Charlie Jenkins <charlie@rivosinc.com> | 2023-09-15 22:30:56 -0400 |
|---|---|---|
| committer | Charlie Jenkins <charlie@rivosinc.com> | 2023-09-15 22:36:43 -0400 |
| commit | 7c15234ff9670247767fb4662849b2090d9894f3 (patch) | |
| tree | 199bed36e371c3b6e1a18032161154982cadebe0 | |
| parent | d752f193cec46cfd33300abba2a3a0d020c36755 (diff) | |
| download | riscv-opcodes-7c15234ff9670247767fb4662849b2090d9894f3.zip riscv-opcodes-7c15234ff9670247767fb4662849b2090d9894f3.tar.gz riscv-opcodes-7c15234ff9670247767fb4662849b2090d9894f3.tar.bz2 | |
Generate compressed shift instructions for rv32
The non-compressed shift instructions have _rv32 versions. Do
the same for the compressed shift instructions.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
| -rw-r--r-- | rv32_c | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -1,5 +1,5 @@ # quadrant 1 c.jal c_imm12 1..0=1 15..13=1 -$pseudo_op rv64_c::c.srli c.srli rd_rs1_p c_nzuimm5 1..0=1 15..13=4 12..10=0 -$pseudo_op rv64_c::c.srai c.srai rd_rs1_p c_nzuimm5 1..0=1 15..13=4 12..10=1 -$pseudo_op rv64_c::c.slli c.slli rd_rs1_n0 c_nzuimm6lo 1..0=2 15..12=0 +$pseudo_op rv64_c::c.srli c.srli_rv32 rd_rs1_p c_nzuimm5 1..0=1 15..13=4 12..10=0 +$pseudo_op rv64_c::c.srai c.srai_rv32 rd_rs1_p c_nzuimm5 1..0=1 15..13=4 12..10=1 +$pseudo_op rv64_c::c.slli c.slli_rv32 rd_rs1_n0 c_nzuimm6lo 1..0=2 15..12=0 |