rocket-tools/riscv-opcodes.git - Unnamed repository; edit this file 'description' to name the repository.

Branch	Commit message	Author	Age
debug	Update the debug CSR definitions for the proposed 0.13 debug spec	Palmer Dabbelt	7 years
incoresemi-migration-to-new-format	Merge branch 'migration-to-new-format' of https://github.com/incoresemi/riscv...	Andrew Waterman	2 years
master	Merge pull request #277 from foss-for-synopsys-dwc-arc-processors/Pseudoinstr...	Andrew Waterman	44 hours
riscv-bitmanip	Remove subu.w	Andrew Waterman	4 years
rnmi	Add RNMI CSRs and instruction	Andrew Waterman	3 years
rvv	Fix config imms	Colin Schmidt	6 years
v	CSRRx is called Zicsr	Andrew Waterman	6 years
vadc	Update encoding of vadc and friends	Andrew Waterman	5 years
wfmi	Add wfmi instruction	Andrew Waterman	3 years
zfh	Add tentative RV32Zfh encoding	Andrew Waterman	4 years
[...]


Age	Commit message	Author	Files	Lines
44 hours	Merge pull request #277 from foss-for-synopsys-dwc-arc-processors/Pseudoinstr...HEAD master	Andrew Waterman	2	-0/+27
2 days	Added some Pseudo Instructions from the ISA and ASM manual	Afonso Oliveira	2	-0/+27
3 days	Merge pull request #276 from foss-for-synopsys-dwc-arc-processors/UpdateDB	Andrew Waterman	2	-11/+9
3 days	Move F extension CSRs to the correct file	Afonso Oliveira	2	-11/+9
4 days	Merge pull request #275 from foss-for-synopsys-dwc-arc-processors/UpdateDB	Andrew Waterman	3	-6/+9
4 days	Zicntr was inside Zicsr file	Afonso Oliveira	3	-6/+9
5 days	Merge pull request #274 from moscickimilosz/expand_nf_instr_dict	Andrew Waterman	1	-1/+34
2024-07-31	Expand nf fields in instr_dict.yaml	Milosz Moscicki	1	-1/+34
2024-07-24	Merge pull request #262 from NyembeziIMG/fix_pseudo_missing_extensions	Andrew Waterman	1	-0/+7
2024-07-17	[Fix] Fix Missing Extensions in Pseudo Instructions	Nyembezi Nyirongo	1	-0/+7
[...]