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rocket-tools/riscv-isa-sim.git
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path:
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/
riscv
/
insns
/
amoadd_w.h
blob: 8eb9e2b020186d78a375a70c0c85fed2a68d769e (
plain
)
1
2
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reg_t v
=
MMU
.
load_int32
(
RS1
);
MMU
.
store_uint32
(
RS1
,
RS2
+
v
);
WRITE_RD
(
v
);