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// See LICENSE for license details.
#ifndef _RISCV_CFG_H
#define _RISCV_CFG_H
#include <optional>
#include "decode.h"
#include "mmu.h"
#include <cassert>
template <typename T>
class cfg_arg_t {
public:
cfg_arg_t(T default_val)
: value(default_val), was_set(false) {}
bool overridden() const { return was_set; }
T operator()() const { return value; }
T operator=(const T v) {
value = v;
was_set = true;
return value;
}
private:
T value;
bool was_set;
};
// Configuration that describes a memory region
class mem_cfg_t
{
public:
mem_cfg_t(reg_t base, reg_t size)
: base(base), size(size)
{
// The truth of these assertions should be ensured by whatever is creating
// the regions in the first place, but we have them here to make sure that
// we can't end up describing memory regions that don't make sense. They
// ask that the page size is a multiple of the minimum page size, that the
// page is aligned to the minimum page size, that the page is non-empty and
// that the top address is still representable in a reg_t.
assert((size % PGSIZE == 0) &&
(base % PGSIZE == 0) &&
(base + size > base));
}
reg_t base;
reg_t size;
};
class cfg_t
{
public:
cfg_t(std::pair<reg_t, reg_t> default_initrd_bounds,
const char *default_bootargs, size_t default_nprocs,
const char *default_isa, const char *default_priv,
const std::vector<mem_cfg_t> &default_mem_layout)
: initrd_bounds(default_initrd_bounds),
bootargs(default_bootargs),
nprocs(default_nprocs),
isa(default_isa),
priv(default_priv),
mem_layout(default_mem_layout)
{}
cfg_arg_t<std::pair<reg_t, reg_t>> initrd_bounds;
cfg_arg_t<const char *> bootargs;
cfg_arg_t<size_t> nprocs;
cfg_arg_t<const char *> isa;
cfg_arg_t<const char *> priv;
cfg_arg_t<std::vector<mem_cfg_t>> mem_layout;
std::optional<reg_t> start_pc;
};
#endif
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