Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2014-02-14 | Renumber uarch CSRs into custom CSR space | Andrew Waterman | 1 | -16/+16 | |
2014-02-13 | Fix I$ simulator not making forward progress | Andrew Waterman | 2 | -21/+17 | |
2014-02-12 | Fix commit log when !debug | Andrew Waterman | 1 | -25/+15 | |
2014-02-10 | Revert to old AUIPC definition | Andrew Waterman | 1 | -1/+1 | |
2014-02-07 | Clear EVEC LSBs, which kindly prevents a segfault | Andrew Waterman | 1 | -2/+2 | |
2014-02-06 | commit missing definitions for uarch counters | Yunsup Lee | 1 | -0/+56 | |
2014-01-31 | Fix linking on Darwin | Andrew Waterman | 1 | -2/+0 | |
2014-01-28 | Force extension loaders to be linked in | Andrew Waterman | 1 | -6/+0 | |
2014-01-26 | Enable runtime loading of dynamic library with --extlib | Andrew Waterman | 1 | -2/+0 | |
2014-01-26 | Eliminate hwacha <-> riscv circular dependence | Andrew Waterman | 6 | -615/+0 | |
We now split out the spike executable into another subproject, which depends on both rocket and hwacha | |||||
2014-01-25 | Merge softfloat_riscv into softfloat | Andrew Waterman | 1 | -1/+0 | |
They really aren't independent libraries. | |||||
2014-01-24 | Require libdl for dynamic linking at runtime | Andrew Waterman | 1 | -0/+2 | |
2014-01-24 | Disassemble amoxor | Andrew Waterman | 1 | -0/+2 | |
2014-01-24 | Build and use shared libraries only | Andrew Waterman | 1 | -2/+2 | |
2014-01-24 | Build and use shared libraries | Andrew Waterman | 1 | -2/+2 | |
2014-01-24 | Handle CSR permissions correctly | Andrew Waterman | 2 | -6/+10 | |
2014-01-21 | Use auto-generated trap cause numbers | Andrew Waterman | 2 | -26/+52 | |
2014-01-20 | Merge branch 'confprec' | Quan Nguyen | 33 | -0/+0 | |
Conflicts: hwacha/hwacha.mk.in | |||||
2014-01-16 | Initialize tohost and fromhost to zero | Andrew Waterman | 1 | -2/+5 | |
Surprising we got away without doing this for so long | |||||
2014-01-13 | Improve performance for branchy code | Andrew Waterman | 13 | -84/+130 | |
We now use a heavily unrolled loop as the software I$, which allows the host machine's branch target prediction to associate target PCs with unique-ish host PCs. | |||||
2013-12-17 | Speed things up quite a bit | Andrew Waterman | 6 | -78/+117 | |
2013-12-09 | New RDCYCLE encoding | Andrew Waterman | 9 | -38/+39 | |
2013-11-25 | Update to new privileged ISA | Andrew Waterman | 29 | -399/+785 | |
2013-11-24 | Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim into HEAD | Quan Nguyen | 5 | -2/+6 | |
2013-11-21 | fix slli/slliw encoding bug | Yunsup Lee | 1 | -2/+2 | |
2013-11-05 | add accelerator disabled cause | Yunsup Lee | 1 | -0/+1 | |
2013-11-05 | correctly trap when SR_EA is disabled | Yunsup Lee | 3 | -0/+3 | |
2013-11-04 | Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim into confprec | Albert Ou | 13 | -147/+131 | |
2013-10-28 | Pass target machine's return code back to OS | Andrew Waterman | 3 | -3/+4 | |
2013-10-27 | Add missing fcvt opcodes through riscv-opcodes | Quan Nguyen | 1 | -37/+4 | |
2013-10-18 | clean up SR_EA, the enable accelerator bit in status reg | Yunsup Lee | 2 | -5/+4 | |
2013-10-18 | refactor disassembler, and add hwacha disassembler | Yunsup Lee | 11 | -139/+123 | |
2013-10-17 | Add empty opcode header files for half-precision | Quan Nguyen | 34 | -4/+37 | |
* Update riscv/opcodes.h through the riscv-opcodes repository. | |||||
2013-10-17 | add hwacha exception support | Yunsup Lee | 2 | -14/+1 | |
2013-10-17 | fix custom-1 rocc encoding | Yunsup Lee | 1 | -1/+1 | |
2013-10-16 | use reset virtual method | Yunsup Lee | 1 | -1/+1 | |
2013-10-16 | fix missing null check when there's no extension | Yunsup Lee | 1 | -1/+2 | |
2013-10-16 | revamp hwacha; now runs in physical mode | Yunsup Lee | 8 | -7/+9 | |
2013-10-15 | Propogate the reset call to the extensions as well. Add reset function to ↵ | Stephen Twigg | 3 | -1/+8 | |
extensions (demonstration in dummy acc) | |||||
2013-10-15 | Fix bug where xs2 was not being properly respected. | Stephen Twigg | 1 | -1/+1 | |
2013-09-27 | Added commit logging (--enable-commitlog). Also fixed disasm bug. | Christopher Celio | 4 | -6/+54 | |
2013-09-27 | Use WRITE_RD/WRITE_FRD macros to write registers | Andrew Waterman | 141 | -185/+167 | |
2013-09-23 | fixes compile bug for not being able to find std::logic_error | Scott Beamer | 1 | -0/+1 | |
2013-09-23 | Fix Scott's deadlock | Andrew Waterman | 3 | -7/+11 | |
Not Scott's fault, I mean | |||||
2013-09-22 | Adjust rocc_inst_t to properly extract fields due to the new ISA encoding. | Stephen Twigg | 1 | -3/+3 | |
2013-09-21 | Update ISA encoding and AUIPC semantics | Andrew Waterman | 3 | -168/+170 | |
2013-09-15 | Add helper disassembly program | Andrew Waterman | 2 | -0/+42 | |
2013-09-15 | ISA changes | Andrew Waterman | 1 | -2/+2 | |
2013-09-11 | Add AMOXOR | Andrew Waterman | 3 | -16/+25 | |
2013-09-11 | Implement zany immediates | Andrew Waterman | 39 | -459/+233 | |