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AgeCommit message (Collapse)AuthorFilesLines
2023-05-11Plumb in effective virtual bit to take_trigger_action()rbuchner1-3/+3
2023-04-04Don't waste time checking icount when unnecessaryScott Johnson1-1/+1
2023-02-04Remove decode_macros.h from disasm.hJerry Zhao1-0/+1
2023-01-30triggers: add detect_icount_match()YenHaoChen1-0/+8
2023-01-30triggers: force to slow path with icount triggersYenHaoChen1-1/+1
2023-01-05Remove vestigial UNUSED annotationAndrew Waterman1-1/+1
It dates back to when this code was ifdef'd.
2023-01-05Only update histogram when histogrammingAndrew Waterman1-1/+2
This is worth a 1.4x speedup on the slow path (when not histogramming).
2023-01-03Fix debug-mode regression introduced by 20e7f53Jerry Zhao1-5/+7
- Debug mode should break the processor out of wfi - wfi in debug mode should execute as a nop
2022-12-27Prevent processor_t from retiring instructions after a WFIJerry Zhao1-0/+5
2022-12-21Only clear logging structures if logging is enabledAndrew Waterman1-2/+5
This speeds up histogramming when logging is disabled, with almost no slowdown for the logging case.
2022-12-21Always use slow path for histogrammingAndrew Waterman1-2/+2
Speeds up fast path after unconditionally enabling histogram.
2022-12-21Support histogram regardless of configure flagAndrew Waterman1-2/+0
2022-12-20Split execute_insn into fast and logged variantsJerry Zhao1-14/+9
Fast variant should only be used when logging is disabled
2022-12-20Force slow-path when commit-logging is enabledJerry Zhao1-1/+1
2022-12-20Always compile commit-log utility functionsJerry Zhao1-2/+0
2022-12-20Always perform symbol lookup in debugJerry Zhao1-5/+0
2022-12-20Fix compile error in commit-logging codeJerry Zhao1-3/+3
2022-12-15Add config.h includes directly to source files instead of relying on header ↵Jerry Zhao1-0/+1
chaining This step is to ensure that removing config.h out of headers will not cause regressions.
2022-12-01Convert triggers::module_t::detect_trap_match to std::optionalScott Johnson1-3/+3
Goal is to remove match_result_t.fire field to eliminate dont-care fields.
2022-12-01triggers: add itrigger_tYenHaoChen1-1/+5
add module_t::trap_taking_match and trigger_t::trap_taking_match for checking itrigger after taking traps
2022-12-01triggers: refactor: add take_trigger_action() to processor.h/processor.ccYenHaoChen1-12/+1
2022-10-21fix print message of size-1 accessesYenHaoChen1-1/+1
The number of digits indicates the size of accesses. A size-1 access needs two digits instead of one.
2022-10-06Don't use reexecution as the means to implement trigger-afterAndrew Waterman1-9/+0
The scheme was based on the notion that memory accesses are idempotent up until the point the trigger would've been hit, which isn't true in the case of side-effecting loads and data-value triggers. Instead, check the trigger on the next instruction fetch. To keep the perf overhead minimal, perform this check on the I$ refill path, and ensure that path is taken by flushing the I$.
2022-10-04Suppress most unused variable warningsAndrew Waterman1-1/+1
2022-10-04Delete functions that are actually unusedAndrew Waterman1-4/+0
2022-08-10Fix code indentation in processor.cc, interactive.cc, debug_module.h/ccWeiwei Li1-12/+12
execute.cc, entropy_source.h and v_ext_macros.h
2022-08-10Add #ifdef RISCV_ENABLE_COMMITLOG for commitlog related codeWeiwei Li1-0/+2
2022-06-01Remove the now-unused PC_SERIALIZE_WFIKip Walker1-1/+0
When WFI was changed to throw a C++ exception, the special-npc signaling became obsolete.
2022-05-19Move ebreak* logic from take_trap into instructions. (#1006)Tim Newsome1-0/+4
Now that logic only affects ebreak instructions, and does not affect triggers that also cause a trap to be taken. Fixes #725. Although like Paul, I don't have a test for this case. Introduce trap_debug_mode so so ebreak instructions can force entry into debug mode.
2022-05-04Fix the padding of register names in the log (#987)Shaked Flur1-1/+1
This fix print x5 as "x5 ", instead of "x 5".
2022-04-05Move trigger match logic into triggers.ccTim Newsome1-1/+1
2022-04-05trigger_matched_t -> triggers::matched_tTim Newsome1-1/+1
2022-03-30Replace state.mcontrol with TM.triggers.Tim Newsome1-1/+1
Created a new triggers::module_t to hold the structure. Also make sure mcontrol_t instances are properly initialized.
2022-03-30mcontrol_action_t -> triggers::action_tTim Newsome1-2/+2
These actions are not specific to the mcontrol trigger.
2022-02-19Make comment more germaneAndrew Waterman1-5/+1
2022-02-18Split out MINSTRET and MCYCLERupert Swarbrick1-0/+8
Before this change, the MCYCLE CSR was just a proxy for MINSTRET. Similarly, CYCLE was a proxy for INSTRET. This models a machine where every instruction takes exactly one cycle to execute. That's not quite precise enough if you want to do cosimulation: there, you're going to want to MCYCLE to actually match the behaviour of your processor (because you need reads from the relevant CSRs to give the expected result). This commit splits the two CSRs, leaving the other proxy relationships unchanged. The code in processor_t::step() which bumps MINSTRET now bumps MCYCLE by the same amount, maintaining the previous behaviour. Of course, now a cosimulation environment can update the value of MCYCLE to fix things up for multi-cycle instructions after they run.
2021-11-04Report proper GVA bit on breakpoint trapsScott Johnson1-1/+1
2021-11-04Add gva field to trap_breakpointScott Johnson1-1/+1
So I can fix breakpoints next to properly report gva.
2021-11-03Use appropriate subclass for breakpoint trapScott Johnson1-1/+1
Improves log because it now shows "trap_breakpoint" instead of "trap #3".
2021-09-29Convert vl to csr_tScott Johnson1-1/+1
Adds commit log events for vl to many vector instructions.
2021-09-26Convert dcsr to csr_tScott Johnson1-1/+1
2021-09-16Convert minstret to csr_tScott Johnson1-1/+1
This is a little messy in RV32 since it's accessed via two different CSRs (upper and lower halves). This changes logging of mcycle[h] to log a change to minstret[h], since that's how it's always been implemented in Spike. There is no separate mcycle register.
2021-07-28Inline execute_insnAndrew Waterman1-1/+1
2021-07-17commitlog: add toggle for wfiChih-Min Chao1-1/+3
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2021-06-02Remove Duff's Device in main simulation loop (#721)Andrew Waterman1-43/+12
With recent compilers on recent computers, the much simpler version of the code is actually slightly faster. I suspect, but haven't proven, that more accurate indirect jump prediction is the main explanation. Reduced I$ pressure might be a secondary factor.
2021-02-09Fix commit log for WFI instructionsAndrew Waterman1-0/+3
Resolves #642
2021-01-27Increment minstret when WFI completes (#636)Scott Johnson1-1/+1
See https://github.com/riscv/riscv-isa-manual/issues/189#issuecomment-768525017
2020-10-26commitlog: fix compilation warningChih-Min Chao1-1/+1
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2020-10-06rvv: commitlog: get hartid directlyChih-Min Chao1-2/+1
To avoid handling inconsistent csr status when running with reference design Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
2020-09-29Adding symbol lookup when --enable-commitlog is enabled (#558)sthiruva1-0/+5
* Adding symbol lookup when --enable-commitlog is enabled * Removed the #ifdef RISCV_ENABLE_COMMITLOG for all get_symbol related function Only retained the in processor.cc where it is called. Co-authored-by: Shajid Thiruvathodi <sthiruva@valtrix.in>
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