aboutsummaryrefslogtreecommitdiff
path: root/riscv/processor.cc
diff options
context:
space:
mode:
Diffstat (limited to 'riscv/processor.cc')
-rw-r--r--riscv/processor.cc5
1 files changed, 2 insertions, 3 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc
index ac5c1f7..3fe0d99 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -210,9 +210,8 @@ reg_t processor_t::set_pcr(int which, reg_t val)
#ifndef RISCV_ENABLE_FPU
state.sr &= ~SR_EF;
#endif
-#ifndef RISCV_ENABLE_VEC
- state.sr &= ~SR_EV;
-#endif
+ if (!ext)
+ state.sr &= ~SR_EA;
state.sr &= ~SR_ZERO;
mmu->flush_tlb();
break;