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-rw-r--r--riscv/insns/vrol_vv.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/riscv/insns/vrol_vv.h b/riscv/insns/vrol_vv.h
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+++ b/riscv/insns/vrol_vv.h
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+// vrol.vv vd, vs2, vs1, vm
+
+#include "zvk_ext_macros.h"
+
+require_zvbb;
+
+// 'mask' selects the low log2(vsew) bits of the shift amount,
+// to limit the maximum shift to "vsew - 1" bits.
+const reg_t mask = P.VU.vsew - 1;
+
+VI_VV_ULOOP
+({
+ // For .vv, the shift amount comes from the vs1 element.
+ const reg_t lshift = vs1 & mask;
+ const reg_t rshift = (-lshift) & mask;
+ vd = (vs2 << lshift) | (vs2 >> rshift);
+})