diff options
| -rw-r--r-- | disasm/disasm.cc | 70 | ||||
| -rw-r--r-- | riscv/execute.cc | 2 | ||||
| -rw-r--r-- | riscv/mmu.h | 14 | ||||
| -rw-r--r-- | spike_dasm/spike_dasm.mk.in | 2 | ||||
| -rw-r--r-- | spike_main/spike.cc | 1 |
5 files changed, 81 insertions, 8 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc index 52dede6..d18f089 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -415,6 +415,18 @@ struct : public arg_t { } } p_imm6; +struct : public arg_t { + std::string to_string(insn_t insn) const { + return std::to_string((int)insn.bs()); + } +} bs; + +struct : public arg_t { + std::string to_string(insn_t insn) const { + return std::to_string((int)insn.rcon()); + } +} rcon; + typedef struct { reg_t match; reg_t mask; @@ -2022,6 +2034,64 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) if (isa->extension_enabled(EXT_ZICBOZ)) { DISASM_INSN("cbo.zero", cbo_zero, 0, {&xrs1}); } + + if (isa->extension_enabled(EXT_ZKND) || + isa->extension_enabled(EXT_ZKNE)) { + DISASM_INSN("aes64ks1i", aes64ks1i, 0, {&xrd, &xrs1, &rcon}); + DEFINE_RTYPE(aes64ks2); + } + + if (isa->extension_enabled(EXT_ZKND)) { + if(isa->get_max_xlen() == 64) { + DEFINE_RTYPE(aes64ds); + DEFINE_RTYPE(aes64dsm); + DEFINE_R1TYPE(aes64im); + } else if (isa->get_max_xlen() == 32) { + DISASM_INSN("aes32dsi", aes32dsi, 0, {&xrd, &xrs1, &xrs2, &bs}); + DISASM_INSN("aes32dsmi", aes32dsmi, 0, {&xrd, &xrs1, &xrs2, &bs}); + } + } + + if (isa->extension_enabled(EXT_ZKNE)) { + if(isa->get_max_xlen() == 64) { + DEFINE_RTYPE(aes64es); + DEFINE_RTYPE(aes64esm); + } else if (isa->get_max_xlen() == 32) { + DISASM_INSN("aes32esi", aes32esi, 0, {&xrd, &xrs1, &xrs2, &bs}); + DISASM_INSN("aes32esmi", aes32esmi, 0, {&xrd, &xrs1, &xrs2, &bs}); + } + } + + if (isa->extension_enabled(EXT_ZKNH)) { + DEFINE_R1TYPE(sha256sig0); + DEFINE_R1TYPE(sha256sig1); + DEFINE_R1TYPE(sha256sum0); + DEFINE_R1TYPE(sha256sum1); + if(isa->get_max_xlen() == 64) { + DEFINE_R1TYPE(sha512sig0); + DEFINE_R1TYPE(sha512sig1); + DEFINE_R1TYPE(sha512sum0); + DEFINE_R1TYPE(sha512sum1); + } else if (isa->get_max_xlen() == 32) { + DEFINE_RTYPE(sha512sig0h); + DEFINE_RTYPE(sha512sig0l); + DEFINE_RTYPE(sha512sig1h); + DEFINE_RTYPE(sha512sig1l); + DEFINE_RTYPE(sha512sum0r); + DEFINE_RTYPE(sha512sum1r); + } + } + + if (isa->extension_enabled(EXT_ZKSED)) { + DISASM_INSN("sm4ed", sm4ed, 0, {&xrd, &xrs1, &xrs2, &bs}); + DISASM_INSN("sm4ks", sm4ks, 0, {&xrd, &xrs1, &xrs2, &bs}); + } + + if (isa->extension_enabled(EXT_ZKSH)) { + DEFINE_R1TYPE(sm3p0); + DEFINE_R1TYPE(sm3p1); + } + } disassembler_t::disassembler_t(const isa_parser_t *isa) diff --git a/riscv/execute.cc b/riscv/execute.cc index 98e3cdb..a6ea7a4 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -133,7 +133,7 @@ static void commit_log_print_insn(processor_t *p, reg_t pc, insn_t insn) if (prefix == 'c') fprintf(log_file, " c%d_%s ", rd, csr_name(rd)); else - fprintf(log_file, " %c%2d ", prefix, rd); + fprintf(log_file, " %c%-2d ", prefix, rd); if (is_vreg) commit_log_print_value(log_file, size, &p->VU.elt<uint8_t>(rd, 0)); else diff --git a/riscv/mmu.h b/riscv/mmu.h index dcf338f..8964e29 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -65,11 +65,11 @@ public: #endif } - inline void misaligned_store(reg_t addr, reg_t data, size_t size, uint32_t xlate_flags) + inline void misaligned_store(reg_t addr, reg_t data, size_t size, uint32_t xlate_flags, bool actually_store=true) { #ifdef RISCV_ENABLE_MISALIGNED for (size_t i = 0; i < size; i++) - store_uint8(addr + (target_big_endian? size-1-i : i), data >> (i * 8)); + store_uint8(addr + (target_big_endian? size-1-i : i), data >> (i * 8), actually_store); #else bool gva = ((proc) ? proc->state.v : false) || (RISCV_XLATE_VIRT & xlate_flags); throw trap_store_address_misaligned(gva, addr, 0, 0); @@ -147,9 +147,11 @@ public: // template for functions that store an aligned value to memory #define store_func(type, prefix, xlate_flags) \ - void prefix##_##type(reg_t addr, type##_t val, bool actually_store=true) { \ - if (unlikely(addr & (sizeof(type##_t)-1))) \ - return misaligned_store(addr, val, sizeof(type##_t), xlate_flags); \ + void prefix##_##type(reg_t addr, type##_t val, bool actually_store=true, bool require_alignment=false) { \ + if (unlikely(addr & (sizeof(type##_t)-1))) { \ + if (require_alignment) store_conditional_address_misaligned(addr); \ + else return misaligned_store(addr, val, sizeof(type##_t), xlate_flags, actually_store); \ + } \ reg_t vpn = addr >> PGSHIFT; \ size_t size = sizeof(type##_t); \ if ((xlate_flags) == 0 && likely(tlb_store_tag[vpn % TLB_ENTRIES] == vpn)) { \ @@ -196,7 +198,7 @@ public: template<typename op> \ type##_t amo_##type(reg_t addr, op f) { \ convert_load_traps_to_store_traps({ \ - store_##type(addr, 0, false); \ + store_##type(addr, 0, false, true); \ auto lhs = load_##type(addr, true); \ store_##type(addr, f(lhs)); \ return lhs; \ diff --git a/spike_dasm/spike_dasm.mk.in b/spike_dasm/spike_dasm.mk.in index 0233e62..1003a79 100644 --- a/spike_dasm/spike_dasm.mk.in +++ b/spike_dasm/spike_dasm.mk.in @@ -1,7 +1,7 @@ spike_dasm_subproject_deps = \ disasm \ softfloat \ - $(if $(HAVE_DLOPEN),riscv,) \ + riscv \ spike_dasm_srcs = \ spike_dasm_option_parser.cc \ diff --git a/spike_main/spike.cc b/spike_main/spike.cc index 5529045..3629e35 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -56,6 +56,7 @@ static void help(int exit_code = 1) fprintf(stderr, " This flag can be used multiple times.\n"); fprintf(stderr, " --rbb-port=<port> Listen on <port> for remote bitbang connection\n"); fprintf(stderr, " --dump-dts Print device tree string and exit\n"); + fprintf(stderr, " --dtb=<path> Use specified device tree blob [default: auto-generate]\n"); fprintf(stderr, " --disable-dtb Don't write the device tree blob into memory\n"); fprintf(stderr, " --kernel=<path> Load kernel flat image into memory\n"); fprintf(stderr, " --initrd=<path> Load kernel initrd into memory\n"); |