diff options
| -rw-r--r-- | README.md | 4 | ||||
| -rw-r--r-- | disasm/disasm.cc | 2 | ||||
| -rw-r--r-- | disasm/isa_parser.cc | 12 | ||||
| -rw-r--r-- | riscv/decode_macros.h | 2 | ||||
| -rw-r--r-- | riscv/insns/c_ld.h | 2 | ||||
| -rw-r--r-- | riscv/insns/c_ldsp.h | 2 | ||||
| -rw-r--r-- | riscv/insns/c_sd.h | 2 | ||||
| -rw-r--r-- | riscv/insns/c_sdsp.h | 2 | ||||
| -rw-r--r-- | riscv/isa_parser.h | 2 |
9 files changed, 15 insertions, 15 deletions
@@ -75,8 +75,8 @@ Spike supports the following RISC-V ISA features: - Zvkn, Zvknc, Zvkng extension, v1.0 - Zvks, Zvksc, Zvksg extension, v1.0 - Zicond extension, v1.0 - - Zilsd extension, v0.9.0 - - Zcmlsd extension, v0.9.0 + - Zilsd extension, v0.10 + - Zclsd extension, v0.10 Versioning and APIs ------------------- diff --git a/disasm/disasm.cc b/disasm/disasm.cc index 7042fce..a2acd4e 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -1513,7 +1513,7 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) DISASM_INSN("c.addiw", c_addiw, 0, {&xrd, &rvc_imm}); } - if (isa->get_max_xlen() == 64 || isa->extension_enabled(EXT_ZCMLSD)) { + if (isa->get_max_xlen() == 64 || isa->extension_enabled(EXT_ZCLSD)) { DISASM_INSN("c.ld", c_ld, 0, {&rvc_rs2s, &rvc_ld_address}); DISASM_INSN("c.ldsp", c_ldsp, 0, {&xrd, &rvc_ldsp_address}); DISASM_INSN("c.sd", c_sd, 0, {&rvc_rs2s, &rvc_ld_address}); diff --git a/disasm/isa_parser.cc b/disasm/isa_parser.cc index b5c8b80..69c3e34 100644 --- a/disasm/isa_parser.cc +++ b/disasm/isa_parser.cc @@ -267,8 +267,8 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv) if (max_xlen != 32) bad_isa_string(str, "'Zilsd' requires RV32"); extension_table[EXT_ZILSD] = true; - } else if (ext_str == "zcmlsd") { - extension_table[EXT_ZCMLSD] = true; + } else if (ext_str == "zclsd") { + extension_table[EXT_ZCLSD] = true; } else if (ext_str == "zvbb") { extension_table[EXT_ZVBB] = true; } else if (ext_str == "zvbc") { @@ -416,12 +416,12 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv) extension_table[EXT_ZCD] = true; } - if (extension_table[EXT_ZCMLSD] && extension_table[EXT_ZCF]) { - bad_isa_string(str, "'Zcmlsd' extension conflicts with 'Zcf' extensions"); + if (extension_table[EXT_ZCLSD] && extension_table[EXT_ZCF]) { + bad_isa_string(str, "'Zclsd' extension conflicts with 'Zcf' extensions"); } - if (extension_table[EXT_ZCMLSD] && (!extension_table[EXT_ZCA] || !extension_table[EXT_ZILSD])) { - bad_isa_string(str, "'Zcmlsd' extension requires 'Zca' and 'Zilsd' extensions"); + if (extension_table[EXT_ZCLSD] && (!extension_table[EXT_ZCA] || !extension_table[EXT_ZILSD])) { + bad_isa_string(str, "'Zclsd' extension requires 'Zca' and 'Zilsd' extensions"); } if (extension_table[EXT_ZFBFMIN] && !extension_table['F']) { diff --git a/riscv/decode_macros.h b/riscv/decode_macros.h index 1aa74fb..b343121 100644 --- a/riscv/decode_macros.h +++ b/riscv/decode_macros.h @@ -84,7 +84,7 @@ // Zilsd macros #define WRITE_RD_D(value) (xlen == 32 ? WRITE_RD_PAIR(value) : WRITE_RD(value)) -// Zcmlsd macros +// Zclsd macros #define WRITE_RVC_RS2S_PAIR(value) WRITE_REG_PAIR(insn.rvc_rs2s(), value) #define RVC_RS2S_PAIR READ_REG_PAIR(insn.rvc_rs2s()) #define RVC_RS2_PAIR READ_REG_PAIR(insn.rvc_rs2()) diff --git a/riscv/insns/c_ld.h b/riscv/insns/c_ld.h index 18e0d5e..951243c 100644 --- a/riscv/insns/c_ld.h +++ b/riscv/insns/c_ld.h @@ -1,5 +1,5 @@ require_extension(EXT_ZCA); -require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD)); +require((xlen == 64) || p->extension_enabled(EXT_ZCLSD)); if (xlen == 32) { WRITE_RVC_RS2S_PAIR(MMU.load<int64_t>(RVC_RS1S + insn.rvc_ld_imm())); diff --git a/riscv/insns/c_ldsp.h b/riscv/insns/c_ldsp.h index d8c8ec8..9f44fec 100644 --- a/riscv/insns/c_ldsp.h +++ b/riscv/insns/c_ldsp.h @@ -1,5 +1,5 @@ require_extension(EXT_ZCA); -require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD)); +require((xlen == 64) || p->extension_enabled(EXT_ZCLSD)); require(insn.rvc_rd() != 0); if (xlen == 32) { diff --git a/riscv/insns/c_sd.h b/riscv/insns/c_sd.h index dba9b07..860e2de 100644 --- a/riscv/insns/c_sd.h +++ b/riscv/insns/c_sd.h @@ -1,5 +1,5 @@ require_extension(EXT_ZCA); -require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD)); +require((xlen == 64) || p->extension_enabled(EXT_ZCLSD)); if (xlen == 32) { MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S_PAIR); diff --git a/riscv/insns/c_sdsp.h b/riscv/insns/c_sdsp.h index e95aefa..e6b1f62 100644 --- a/riscv/insns/c_sdsp.h +++ b/riscv/insns/c_sdsp.h @@ -1,5 +1,5 @@ require_extension(EXT_ZCA); -require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD)); +require((xlen == 64) || p->extension_enabled(EXT_ZCLSD)); if (xlen == 32) { MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2_PAIR); diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h index 12cc52e..90e1ec1 100644 --- a/riscv/isa_parser.h +++ b/riscv/isa_parser.h @@ -23,7 +23,7 @@ typedef enum { EXT_ZCB, EXT_ZCD, EXT_ZCF, - EXT_ZCMLSD, + EXT_ZCLSD, EXT_ZCMP, EXT_ZCMT, EXT_ZKND, |