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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-15 01:00:32 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-28 21:49:31 -0700 |
| commit | ea4010704bfe7d3cf64472d409a24fae1107fc62 (patch) | |
| tree | 8efb86cbe8de5700f6ec039f6a10978505a2f2c5 /spike_main | |
| parent | 1edd5a019177ed1f8527465d8c239415a9f9e296 (diff) | |
| download | riscv-isa-sim-ea4010704bfe7d3cf64472d409a24fae1107fc62.zip riscv-isa-sim-ea4010704bfe7d3cf64472d409a24fae1107fc62.tar.gz riscv-isa-sim-ea4010704bfe7d3cf64472d409a24fae1107fc62.tar.bz2 | |
rvv: disasm: add missing .wx format
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'spike_main')
| -rw-r--r-- | spike_main/disasm.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index fe6be50..293539f 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -781,7 +781,9 @@ disassembler_t::disassembler_t(int xlen) #define DISASM_OPIV_W___INSN(name, sign) \ add_insn(new disasm_insn_t(#name ".wv", match_##name##_wv, mask_##name##_wv, \ - {&vd, &vs2, &vs1, &opt, &vm})); + {&vd, &vs2, &vs1, &opt, &vm})); \ + add_insn(new disasm_insn_t(#name ".wx", match_##name##_wv, mask_##name##_wv, \ + {&vd, &vs2, &xrs1, &opt, &vm})); #define DISASM_OPIV_M___INSN(name, sign) \ add_insn(new disasm_insn_t(#name ".mm", match_##name##_mm, mask_##name##_mm, \ |