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author | Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> | 2022-10-10 15:01:32 +0300 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2022-10-14 12:10:36 -0700 |
commit | 60c0c86c288d14c81177e6f56aa5c6b77e40fbec (patch) | |
tree | 48f32740d88395d67689d51bab21b73f1fb0a5e1 /spike_main | |
parent | e2e66015af4b5fce4bc958e70398f1fb7af7bcd9 (diff) | |
download | riscv-isa-sim-60c0c86c288d14c81177e6f56aa5c6b77e40fbec.zip riscv-isa-sim-60c0c86c288d14c81177e6f56aa5c6b77e40fbec.tar.gz riscv-isa-sim-60c0c86c288d14c81177e6f56aa5c6b77e40fbec.tar.bz2 |
Report error if an unsupported memory configuration is detected
Diffstat (limited to 'spike_main')
-rw-r--r-- | spike_main/spike.cc | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/spike_main/spike.cc b/spike_main/spike.cc index f23a2f4..ecce0c5 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -174,15 +174,20 @@ static std::vector<mem_cfg_t> parse_mem_layout(const char* arg) if (size % PGSIZE != 0) size += PGSIZE - size % PGSIZE; - if (base + size < base) - help(); - if (size != size0) { fprintf(stderr, "Warning: the memory at [0x%llX, 0x%llX] has been realigned\n" "to the %ld KiB page size: [0x%llX, 0x%llX]\n", base0, base0 + size0 - 1, long(PGSIZE / 1024), base, base + size - 1); } + if (!mem_cfg_t::check_if_supported(base, size)) { + fprintf(stderr, "unsupported memory region " + "{base = 0x%llX, size = 0x%llX} specified\n", + (unsigned long long)base, + (unsigned long long)size); + exit(EXIT_FAILURE); + } + res.push_back(mem_cfg_t(reg_t(base), reg_t(size))); if (!*p) break; |