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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-05-15 12:03:00 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-05-15 12:03:00 -0700 |
| commit | a9d1c3de84f79721dda71a12ddcdf87bf3675308 (patch) | |
| tree | e11bf708dbcdb87250a042f502c2d61451f423c1 /riscv | |
| parent | 28b983b2663792cf4c0c3c8b5098e1aa5b6e2bae (diff) | |
| download | riscv-isa-sim-a9d1c3de84f79721dda71a12ddcdf87bf3675308.zip riscv-isa-sim-a9d1c3de84f79721dda71a12ddcdf87bf3675308.tar.gz riscv-isa-sim-a9d1c3de84f79721dda71a12ddcdf87bf3675308.tar.bz2 | |
change riscv-isa-run to spike in documentation
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/spike.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/spike.cc b/riscv/spike.cc index 142df33..c9b755d 100644 --- a/riscv/spike.cc +++ b/riscv/spike.cc @@ -13,7 +13,7 @@ static void help() { - fprintf(stderr, "usage: riscv-isa-run [host options] <target program> [target options]\n"); + fprintf(stderr, "usage: spike [host options] <target program> [target options]\n"); fprintf(stderr, "Host Options:\n"); fprintf(stderr, " -p <n> Simulate <n> processors\n"); fprintf(stderr, " -m <n> Provide <n> MB of target memory\n"); |