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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-04-17 04:38:17 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-04-17 04:38:17 -0700 |
| commit | 8ec519af6858c503719f67e1a00652d7c575799f (patch) | |
| tree | 767dd3285ae30edc9864de0f8722d4503ff34202 /riscv | |
| parent | b189b9b128ce619f9423009062a85ccb17b32db9 (diff) | |
| download | riscv-isa-sim-8ec519af6858c503719f67e1a00652d7c575799f.zip riscv-isa-sim-8ec519af6858c503719f67e1a00652d7c575799f.tar.gz riscv-isa-sim-8ec519af6858c503719f67e1a00652d7c575799f.tar.bz2 | |
add AUIPC insn; remove RDNPC insn
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/disasm.cc | 2 | ||||
| -rw-r--r-- | riscv/insns/auipc.h | 1 | ||||
| -rw-r--r-- | riscv/insns/rdnpc.h | 1 | ||||
| -rw-r--r-- | riscv/opcodes.h | 4 | ||||
| -rw-r--r-- | riscv/riscv.mk.in | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/riscv/disasm.cc b/riscv/disasm.cc index d8c4ab0..8bab238 100644 --- a/riscv/disasm.cc +++ b/riscv/disasm.cc @@ -502,11 +502,11 @@ disassembler::disassembler() DEFINE_BTYPE(bgeu) DEFINE_LTYPE(lui); + DEFINE_LTYPE(auipc); DEFINE_I2TYPE("jr", jalr_j); add_insn(new disasm_insn_t("jalr", match_jalr_c | match_rd_ra, mask_jalr_c | mask_rd | mask_imm, xrs1_reg)); add_insn(new disasm_insn_t("ret", match_jalr_r | match_rs1_ra, mask_jalr_r | mask_rd | mask_rs1 | mask_imm)); - DEFINE_DTYPE(rdnpc); DEFINE_ITYPE(jalr_c); DEFINE_ITYPE(jalr_r); DEFINE_ITYPE(jalr_j); diff --git a/riscv/insns/auipc.h b/riscv/insns/auipc.h new file mode 100644 index 0000000..48480cd --- /dev/null +++ b/riscv/insns/auipc.h @@ -0,0 +1 @@ +RD = sext_xprlen(sext32(BIGIMM << IMM_BITS) + pc); diff --git a/riscv/insns/rdnpc.h b/riscv/insns/rdnpc.h deleted file mode 100644 index 5525421..0000000 --- a/riscv/insns/rdnpc.h +++ /dev/null @@ -1 +0,0 @@ -RD = npc; diff --git a/riscv/opcodes.h b/riscv/opcodes.h index 8ac1ab2..ab33192 100644 --- a/riscv/opcodes.h +++ b/riscv/opcodes.h @@ -9,7 +9,6 @@ DECLARE_INSN(bltu, 0x363, 0x3ff) DECLARE_INSN(vlsegstwu, 0xb0b, 0xfff) DECLARE_INSN(vvcfg, 0x473, 0xf801ffff) DECLARE_INSN(movz, 0x2f7, 0x1ffff) -DECLARE_INSN(fcvt_lu_s, 0x9053, 0x3ff1ff) DECLARE_INSN(c_ld, 0x9, 0x1f) DECLARE_INSN(c_srli32, 0xc19, 0x1c1f) DECLARE_INSN(fmin_s, 0x18053, 0x1ffff) @@ -234,10 +233,11 @@ DECLARE_INSN(fence_v_g, 0x2af, 0x3ff) DECLARE_INSN(vmsv, 0x873, 0x3fffff) DECLARE_INSN(vmst, 0x1073, 0x1ffff) DECLARE_INSN(setpcr, 0xfb, 0x3ff) -DECLARE_INSN(rdnpc, 0x26b, 0x7ffffff) +DECLARE_INSN(fcvt_lu_s, 0x9053, 0x3ff1ff) DECLARE_INSN(vxcpthold, 0x277b, 0xffffffff) DECLARE_INSN(fcvt_s_l, 0xc053, 0x3ff1ff) DECLARE_INSN(vflsegstd, 0xd8b, 0xfff) +DECLARE_INSN(auipc, 0x17, 0x7f) DECLARE_INSN(c_add, 0x1a, 0x801f) DECLARE_INSN(fcvt_lu_d, 0x90d3, 0x3ff1ff) DECLARE_INSN(vfld, 0x58b, 0x3fffff) diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index bf6e07a..b3f8598 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -33,7 +33,7 @@ DISPATCH_SRCS := \ $(DISPATCH_SRCS): %.cc: dispatch $(wildcard insns/*.h) $(riscv_hdrs) $< $(subst dispatch,,$(subst .cc,,$@)) $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@ -$(src_dir)/riscv/dispatch.h: %.h: dispatch +dispatch.h: %.h: dispatch $(riscv_hdrs) $< $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@ riscv_srcs = \ |