aboutsummaryrefslogtreecommitdiff
path: root/riscv
diff options
context:
space:
mode:
authorAndrew Waterman <waterman@cs.berkeley.edu>2013-04-23 01:00:20 -0700
committerAndrew Waterman <waterman@cs.berkeley.edu>2013-04-23 01:00:20 -0700
commit60a69f08bffb55e044a698e065242bdfd5b585ab (patch)
treec0c426f5cd7aac184b133eb1cba06eb73e32e9e3 /riscv
parentc43f02f294aa5c148b223b117a885b8fd7a7987d (diff)
downloadriscv-isa-sim-60a69f08bffb55e044a698e065242bdfd5b585ab.zip
riscv-isa-sim-60a69f08bffb55e044a698e065242bdfd5b585ab.tar.gz
riscv-isa-sim-60a69f08bffb55e044a698e065242bdfd5b585ab.tar.bz2
destroy htif on simulator termination
Diffstat (limited to 'riscv')
-rw-r--r--riscv/sim.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/riscv/sim.h b/riscv/sim.h
index 2676ba4..ed0bda9 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -5,6 +5,7 @@
#include <vector>
#include <string>
+#include <memory>
#include "processor.h"
#include "mmu.h"
@@ -31,7 +32,7 @@ public:
reg_t get_scr(int which);
private:
- htif_isasim_t* htif;
+ std::auto_ptr<htif_isasim_t> htif;
char* mem; // main memory
size_t memsz; // memory size in bytes
mmu_t* mmu; // debug port into main memory