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author | Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-01-13 16:42:02 -0800 |
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committer | Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-01-13 16:42:02 -0800 |
commit | 77f281580773fe5217ae40bcf8a0f8bc05c28ded (patch) | |
tree | 79885362aa51ce842ec912ba4523f36620b1dce8 /riscv/sim.h | |
parent | 7f457c47b339cc7c79f56bb277ed8ed989e88ae1 (diff) | |
download | riscv-isa-sim-77f281580773fe5217ae40bcf8a0f8bc05c28ded.zip riscv-isa-sim-77f281580773fe5217ae40bcf8a0f8bc05c28ded.tar.gz riscv-isa-sim-77f281580773fe5217ae40bcf8a0f8bc05c28ded.tar.bz2 |
Improve performance for branchy code
We now use a heavily unrolled loop as the software I$, which allows the
host machine's branch target prediction to associate target PCs with
unique-ish host PCs.
Diffstat (limited to 'riscv/sim.h')
-rw-r--r-- | riscv/sim.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/riscv/sim.h b/riscv/sim.h index d643e6d..d437c1a 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -24,6 +24,7 @@ public: void stop(); void set_debug(bool value); void set_procs_debug(bool value); + htif_isasim_t* get_htif() { return htif.get(); } // deliver an IPI to a specific processor void send_ipi(reg_t who); @@ -36,7 +37,7 @@ public: reg_t get_scr(int which); private: - std::auto_ptr<htif_isasim_t> htif; + std::unique_ptr<htif_isasim_t> htif; char* mem; // main memory size_t memsz; // memory size in bytes mmu_t* debug_mmu; // debug port into main memory |