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author | Chih-Min Chao <chihmin.chao@sifive.com> | 2021-02-22 20:16:48 -0800 |
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committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2021-02-24 18:40:56 -0800 |
commit | a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19 (patch) | |
tree | d0d9d94894cf0c34ea1a116143be9b2e51c4bd4b /riscv/riscv.mk.in | |
parent | 45b894876112a9f6ac5639bb6ee8427211df7280 (diff) | |
download | riscv-isa-sim-a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19.zip riscv-isa-sim-a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19.tar.gz riscv-isa-sim-a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19.tar.bz2 |
rvv: add vsetivli
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/riscv.mk.in')
-rw-r--r-- | riscv/riscv.mk.in | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 0a25b0a..d4422fe 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -875,6 +875,7 @@ riscv_insn_ext_v_ldst = \ vs8r_v \ riscv_insn_ext_v_ctrl = \ + vsetivli \ vsetvli \ vsetvl \ |