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author | Clifford Wolf <clifford@clifford.at> | 2019-11-08 17:49:36 +0100 |
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committer | Andrew Waterman <andrew@sifive.com> | 2020-10-22 17:00:11 -0700 |
commit | 147aef1628dca043e4b3de8a3b586f07ab46ae46 (patch) | |
tree | 67a60e55b407b47da7f51341d93a9b88e054ccd4 /riscv/riscv.mk.in | |
parent | a4a2ce20caf756e39e109f5cc047238c35e03857 (diff) | |
download | riscv-isa-sim-147aef1628dca043e4b3de8a3b586f07ab46ae46.zip riscv-isa-sim-147aef1628dca043e4b3de8a3b586f07ab46ae46.tar.gz riscv-isa-sim-147aef1628dca043e4b3de8a3b586f07ab46ae46.tar.bz2 |
[riscv-bitmanip] Changes for RISC-V Bitmanip Spec 0.92
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'riscv/riscv.mk.in')
-rw-r--r-- | riscv/riscv.mk.in | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 04c35da..4cc82d0 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -387,6 +387,9 @@ riscv_insn_ext_b = \ minu \ orn \ pack \ + packh \ + packu \ + packuw \ packw \ pcnt \ pcntw \ @@ -411,6 +414,8 @@ riscv_insn_ext_b = \ sbseti \ sbsetiw \ sbsetw \ + sext_b \ + sext_h \ shfl \ shfli \ shflw \ |