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| author | Samuel Obuch <sobuch@codasip.com> | 2020-08-11 16:42:56 +0200 |
|---|---|---|
| committer | Samuel Obuch <sobuch@codasip.com> | 2020-08-11 16:49:22 +0200 |
| commit | 5e073efff040fc7f765881522f0da4e91fed00d4 (patch) | |
| tree | a77f1277eee400e31e82f1ff31565a37126ad0cb /riscv/debug_module.h | |
| parent | da34b0eee44274ba4e0cddd27add832c427001bb (diff) | |
| download | riscv-isa-sim-5e073efff040fc7f765881522f0da4e91fed00d4.zip riscv-isa-sim-5e073efff040fc7f765881522f0da4e91fed00d4.tar.gz riscv-isa-sim-5e073efff040fc7f765881522f0da4e91fed00d4.tar.bz2 | |
Add option to dissable implicit ebreak in program buffer
Diffstat (limited to 'riscv/debug_module.h')
| -rw-r--r-- | riscv/debug_module.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/debug_module.h b/riscv/debug_module.h index 42a521e..2bcdba4 100644 --- a/riscv/debug_module.h +++ b/riscv/debug_module.h @@ -18,6 +18,7 @@ typedef struct { bool support_hasel; bool support_abstract_csr_access; bool support_haltgroups; + bool support_impebreak; } debug_module_config_t; typedef struct { |