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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-06 23:48:08 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-09 18:33:49 -0700 |
| commit | 942662a2334da7a6cb2f5015fd2145f578b2df76 (patch) | |
| tree | aa970e4950d7afdf8380f722423d194600f8728e /fesvr/dtm.cc | |
| parent | c069be72bbe95f562913436673f61e0e8fa90d72 (diff) | |
| download | riscv-isa-sim-942662a2334da7a6cb2f5015fd2145f578b2df76.zip riscv-isa-sim-942662a2334da7a6cb2f5015fd2145f578b2df76.tar.gz riscv-isa-sim-942662a2334da7a6cb2f5015fd2145f578b2df76.tar.bz2 | |
rvv: missing vector enabling check for mask operation
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'fesvr/dtm.cc')
0 files changed, 0 insertions, 0 deletions