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author | Markku-Juhani O. Saarinen <mjos@pqshield.com> | 2021-11-02 11:21:40 +0000 |
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committer | GitHub <noreply@github.com> | 2021-11-02 04:21:40 -0700 |
commit | 47aa83c2dda373bc266de2cb5fc85544cb7bdea8 (patch) | |
tree | f796f17606b08f9b382005724f1d4aa504c0fb16 /disasm | |
parent | b35ab02a8a1c5ad1547f76c934328dfb4d9eab45 (diff) | |
download | riscv-isa-sim-47aa83c2dda373bc266de2cb5fc85544cb7bdea8.zip riscv-isa-sim-47aa83c2dda373bc266de2cb5fc85544cb7bdea8.tar.gz riscv-isa-sim-47aa83c2dda373bc266de2cb5fc85544cb7bdea8.tar.bz2 |
remove uret (#847)
Co-authored-by: Markku-Juhani O. Saarinen <mjos@mjos.fi>
Diffstat (limited to 'disasm')
-rw-r--r-- | disasm/disasm.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc index 68567ad..8e0042a 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -855,7 +855,6 @@ disassembler_t::disassembler_t(int xlen) DEFINE_NOARG(ecall); DEFINE_NOARG(ebreak); - DEFINE_NOARG(uret); DEFINE_NOARG(sret); DEFINE_NOARG(mret); DEFINE_NOARG(dret); |