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author | Tim Newsome <tim@sifive.com> | 2016-04-30 15:24:38 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2016-05-23 12:12:11 -0700 |
commit | 784fea2bbec803944eb923196c77d38427b3f554 (patch) | |
tree | 273e526ac00c09b43c1e2b2986913503ccf1170b /debug_rom | |
parent | 47f64aaf95701d02a6b149b72422d319c8d99536 (diff) | |
download | riscv-isa-sim-784fea2bbec803944eb923196c77d38427b3f554.zip riscv-isa-sim-784fea2bbec803944eb923196c77d38427b3f554.tar.gz riscv-isa-sim-784fea2bbec803944eb923196c77d38427b3f554.tar.bz2 |
Exceptions in Debug Mode, stay in Debug Mode.
Now things don't blow up when reading a non-existent CSR.
Diffstat (limited to 'debug_rom')
-rwxr-xr-x | debug_rom/debug_rom.S | 13 | ||||
-rw-r--r-- | debug_rom/debug_rom.h | 31 |
2 files changed, 28 insertions, 16 deletions
diff --git a/debug_rom/debug_rom.S b/debug_rom/debug_rom.S index 832ac49..b1fa8bd 100755 --- a/debug_rom/debug_rom.S +++ b/debug_rom/debug_rom.S @@ -20,14 +20,25 @@ .global entry .global resume + .global exception # Automatically called when Debug Mode is first entered. entry: j _entry # Should be called by Debug RAM code that has finished execution and # wants to return to Debug Mode. resume: + j _resume +exception: + # Flip the LSB of the first word in Debug RAM so the debugger can know + # that we hit an exception. + lw s1, (DEBUG_RAM)(zero) + xori s1, s1, 1 + sw s1, (DEBUG_RAM)(zero) + + # Fall through to resume. + +_resume: # Clear debug interrupt. -clear_debint: csrr s1, CSR_MHARTID sw s1, CLEARDEBINT(zero) fence diff --git a/debug_rom/debug_rom.h b/debug_rom/debug_rom.h index 3ab78a1..f8aa2e0 100644 --- a/debug_rom/debug_rom.h +++ b/debug_rom/debug_rom.h @@ -1,17 +1,18 @@ static const unsigned char debug_rom_raw[] = { - 0x6f, 0x00, 0xc0, 0x04, 0xf3, 0x24, 0x40, 0xf1, 0x23, 0x24, 0x90, 0x10, - 0x0f, 0x00, 0xf0, 0x0f, 0xf3, 0x24, 0x00, 0xf1, 0x63, 0xc6, 0x04, 0x00, - 0x83, 0x24, 0xc0, 0x43, 0x6f, 0x00, 0x80, 0x01, 0x93, 0x94, 0x14, 0x00, - 0x63, 0xc6, 0x04, 0x00, 0x83, 0x34, 0x80, 0x43, 0x6f, 0x00, 0x80, 0x00, - 0x13, 0x00, 0x00, 0x00, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x84, 0x00, - 0x63, 0x04, 0x04, 0x00, 0x6f, 0x00, 0x40, 0x05, 0x73, 0x24, 0x20, 0x79, - 0x73, 0x00, 0x20, 0x30, 0x73, 0x10, 0x24, 0x79, 0x73, 0x24, 0x00, 0x79, - 0x13, 0x74, 0x74, 0x00, 0x13, 0x04, 0xd4, 0xff, 0x63, 0x16, 0x04, 0x02, - 0x73, 0x24, 0x00, 0xf1, 0x63, 0x46, 0x04, 0x00, 0x23, 0x2e, 0x90, 0x42, - 0x67, 0x00, 0x00, 0x40, 0x13, 0x14, 0x14, 0x00, 0x63, 0x46, 0x04, 0x00, - 0x23, 0x3c, 0x90, 0x42, 0x67, 0x00, 0x00, 0x40, 0x13, 0x00, 0x00, 0x00, - 0x67, 0x00, 0x00, 0x40, 0x73, 0x24, 0x40, 0xf1, 0x23, 0x20, 0x80, 0x10, - 0x73, 0x60, 0x04, 0x79, 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x04, 0x40, - 0xe3, 0x0c, 0x04, 0xfe, 0x6f, 0xf0, 0x1f, 0xfc + 0x6f, 0x00, 0xc0, 0x05, 0x6f, 0x00, 0x00, 0x01, 0x83, 0x24, 0x00, 0xc0, + 0x93, 0xc4, 0x14, 0x00, 0x23, 0x20, 0x90, 0xc0, 0xf3, 0x24, 0x50, 0xf1, + 0x23, 0x2c, 0x90, 0xee, 0x0f, 0x00, 0xf0, 0x0f, 0xf3, 0x24, 0x00, 0xf1, + 0x63, 0xc6, 0x04, 0x00, 0x83, 0x24, 0xc0, 0xc3, 0x6f, 0x00, 0x80, 0x01, + 0x93, 0x94, 0x14, 0x00, 0x63, 0xc6, 0x04, 0x00, 0x83, 0x34, 0x80, 0xc3, + 0x6f, 0x00, 0x80, 0x00, 0x13, 0x00, 0x00, 0x00, 0x73, 0x24, 0x00, 0x79, + 0x13, 0x74, 0x84, 0x00, 0x63, 0x04, 0x04, 0x00, 0x6f, 0x00, 0x40, 0x05, + 0x73, 0x24, 0x20, 0x79, 0x73, 0x00, 0x20, 0x10, 0x73, 0x10, 0x24, 0x79, + 0x73, 0x24, 0x00, 0x79, 0x13, 0x74, 0x74, 0x00, 0x13, 0x04, 0xd4, 0xff, + 0x63, 0x16, 0x04, 0x02, 0x73, 0x24, 0x00, 0xf1, 0x63, 0x46, 0x04, 0x00, + 0x23, 0x2e, 0x90, 0xc2, 0x67, 0x00, 0x00, 0xc0, 0x13, 0x14, 0x14, 0x00, + 0x63, 0x46, 0x04, 0x00, 0x23, 0x3c, 0x90, 0xc2, 0x67, 0x00, 0x00, 0xc0, + 0x13, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0xc0, 0x73, 0x24, 0x50, 0xf1, + 0x23, 0x20, 0x80, 0xf0, 0x73, 0x60, 0x04, 0x79, 0x73, 0x24, 0x00, 0x79, + 0x13, 0x74, 0x04, 0x40, 0xe3, 0x0c, 0x04, 0xfe, 0x6f, 0xf0, 0x1f, 0xfc }; -static const unsigned int debug_rom_raw_len = 164; +static const unsigned int debug_rom_raw_len = 180; |