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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-06-11 16:13:59 -0700 |
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| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-06-11 16:13:59 -0700 |
| commit | e665e552b3944f4003f2cef76f650b38570cb854 (patch) | |
| tree | ffbc4fe09900afc8002d1fd4b4e858106e96c79a /configure | |
| parent | a23f18a6a6b647c7872e605662d8803b15a01e4d (diff) | |
| download | riscv-isa-sim-e665e552b3944f4003f2cef76f650b38570cb854.zip riscv-isa-sim-e665e552b3944f4003f2cef76f650b38570cb854.tar.gz riscv-isa-sim-e665e552b3944f4003f2cef76f650b38570cb854.tar.bz2 | |
[xcc] fix configure scripts
Diffstat (limited to 'configure')
| -rwxr-xr-x | configure | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -1274,9 +1274,9 @@ Optional Features: Enable all optional subprojects --disable-fpu Disable floating-point --disable-64bit Disable 64-bit mode - --disable-rvc Disable instruction compression + --enable-rvc Enable instruction compression --disable-vec Disable vector processor - --disable-icsim Enable instruction cache simulator + --enable-icsim Enable instruction cache simulator Some influential environment variables: CC C compiler command @@ -4056,7 +4056,7 @@ if test "${enable_rvc+set}" = set; then : enableval=$enable_rvc; fi -if test "x$enable_rvc" != "xno"; then : +if test "x$enable_rvc" = "xyes"; then : $as_echo "#define RISCV_ENABLE_RVC /**/" >>confdefs.h |