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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-09-27 00:15:35 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-09-27 00:15:35 -0700 |
| commit | c8a8c07ec296ce36dc04f2448faf48fe1c502a2d (patch) | |
| tree | a497ddda532182cc10aa2f82a555e0d3ab4d220c /README | |
| parent | 6554cdd3fb42bc3833a1888f87dfc67c9099500c (diff) | |
| download | riscv-isa-sim-c8a8c07ec296ce36dc04f2448faf48fe1c502a2d.zip riscv-isa-sim-c8a8c07ec296ce36dc04f2448faf48fe1c502a2d.tar.gz riscv-isa-sim-c8a8c07ec296ce36dc04f2448faf48fe1c502a2d.tar.bz2 | |
Use WRITE_RD/WRITE_FRD macros to write registers
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