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| author | Andrew Waterman <andrew@sifive.com> | 2021-07-22 15:38:19 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-07-22 15:38:19 -0700 |
| commit | 39070797c1239dd18d286b500c8c76cc02783c47 (patch) | |
| tree | 2526d393abf2631d98a11fd7acea77a04d967d63 | |
| parent | b26b05256f4b5bbd6355f7b68bd285ecd5571a6e (diff) | |
| parent | ec57c389f31fe433bee0e1888e2e158c6fa22a79 (diff) | |
| download | riscv-isa-sim-39070797c1239dd18d286b500c8c76cc02783c47.zip riscv-isa-sim-39070797c1239dd18d286b500c8c76cc02783c47.tar.gz riscv-isa-sim-39070797c1239dd18d286b500c8c76cc02783c47.tar.bz2 | |
Merge branch 'daniellustig-nonleaf_dau'
| -rw-r--r-- | riscv/mmu.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 19f1902..5b0c31b 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -332,6 +332,8 @@ reg_t mmu_t::s2xlate(reg_t gva, reg_t gpa, access_type type, access_type trap_ty if (pte & PTE_RSVD) { break; } else if (PTE_TABLE(pte)) { // next level of page table + if (pte & (PTE_D | PTE_A | PTE_U)) + break; base = ppn << PGSHIFT; } else if (!(pte & PTE_V) || (!(pte & PTE_R) && (pte & PTE_W))) { break; @@ -415,6 +417,8 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode, bool virt, bool hlvx if (pte & PTE_RSVD) { break; } else if (PTE_TABLE(pte)) { // next level of page table + if (pte & (PTE_D | PTE_A | PTE_U)) + break; base = ppn << PGSHIFT; } else if ((pte & PTE_U) ? s_mode && (type == FETCH || !sum) : !s_mode) { break; |