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| author | Andrew Waterman <andrew@sifive.com> | 2023-11-16 18:41:15 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2023-11-16 18:41:36 -0800 |
| commit | 4841ad0238f0b71ca86fb28974765495cc0c34a9 (patch) | |
| tree | 134747d29bff63ca9e12cb6bd480db349df46de4 | |
| parent | be5dee0bafb413c9ac8845ca144db9b7641941b2 (diff) | |
| download | riscv-isa-sim-4841ad0238f0b71ca86fb28974765495cc0c34a9.zip riscv-isa-sim-4841ad0238f0b71ca86fb28974765495cc0c34a9.tar.gz riscv-isa-sim-4841ad0238f0b71ca86fb28974765495cc0c34a9.tar.bz2 | |
Fix FMVP.D.X implementation
Resolves #1507
| -rw-r--r-- | riscv/insns/fmvp_d_x.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/fmvp_d_x.h b/riscv/insns/fmvp_d_x.h index f95cfe9..95d786a 100644 --- a/riscv/insns/fmvp_d_x.h +++ b/riscv/insns/fmvp_d_x.h @@ -4,5 +4,5 @@ require_extension(EXT_ZFA); require_fp; ui64_f64 ui; ui.ui = ((uint64_t)RS2) << 32; -ui.ui |= RS1; +ui.ui |= zext32(RS1); WRITE_FRD_D(f64(ui.ui)); |