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| author | Ved Shanbhogue <ved@rivosinc.com> | 2023-10-30 17:23:22 -0500 |
|---|---|---|
| committer | Ved Shanbhogue <ved@rivosinc.com> | 2023-11-02 14:19:20 -0500 |
| commit | 2adfab25a5c206afdd7c06855cbe2e27536d633e (patch) | |
| tree | 77ae4834b218b88160f2df8b85dc1b48ca0531b9 | |
| parent | b96bf5565470a84b55976d50f07c5a42df633896 (diff) | |
| download | riscv-isa-sim-2adfab25a5c206afdd7c06855cbe2e27536d633e.zip riscv-isa-sim-2adfab25a5c206afdd7c06855cbe2e27536d633e.tar.gz riscv-isa-sim-2adfab25a5c206afdd7c06855cbe2e27536d633e.tar.bz2 | |
Add enum for Zabha extension
| -rw-r--r-- | riscv/isa_parser.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h index fac4186..a84b6fe 100644 --- a/riscv/isa_parser.h +++ b/riscv/isa_parser.h @@ -76,6 +76,7 @@ typedef enum { EXT_XZBT, EXT_SSTC, EXT_ZACAS, + EXT_ZABHA, EXT_INTERNAL_ZFH_MOVE, EXT_SMCSRIND, EXT_SSCSRIND, |