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| author | Andrew Waterman <andrew@sifive.com> | 2023-12-09 03:32:28 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-09 03:32:28 -0800 |
| commit | 218c4a3ce84e6388ada878f0106add2f220e4dc2 (patch) | |
| tree | a2e91eede12234da0cebcd67290467dd92b0973a | |
| parent | e04f5f321c1ddf2c734d4d52019be3f0ed210d98 (diff) | |
| parent | 2e2a8cb5c13debaa7ac817946ff440555965b782 (diff) | |
| download | riscv-isa-sim-218c4a3ce84e6388ada878f0106add2f220e4dc2.zip riscv-isa-sim-218c4a3ce84e6388ada878f0106add2f220e4dc2.tar.gz riscv-isa-sim-218c4a3ce84e6388ada878f0106add2f220e4dc2.tar.bz2 | |
Merge pull request #1532 from Madman-Hugo/fix-fmvh_x_d
fix fmvh_x_d.h rv32 sign-extended
| -rw-r--r-- | riscv/insns/fmvh_x_d.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/fmvh_x_d.h b/riscv/insns/fmvh_x_d.h index 961ad76..28abb60 100644 --- a/riscv/insns/fmvh_x_d.h +++ b/riscv/insns/fmvh_x_d.h @@ -4,4 +4,4 @@ require_extension(EXT_ZFA); require_fp; ui64_f64 ui; ui.f = FRS1_D; -WRITE_RD(ui.ui >> 32); +WRITE_RD(sext32(ui.ui >> 32)); |