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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-10-17 19:44:53 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-10-17 19:44:53 -0700 |
| commit | 1057bae0a0d272567189421d22ed6e190c5e30a6 (patch) | |
| tree | e11812424a304750c28ec5b58e887225a36aefd4 | |
| parent | 0f140bcde46a940f76d3e06857d3f572ab6966c4 (diff) | |
| download | riscv-isa-sim-1057bae0a0d272567189421d22ed6e190c5e30a6.zip riscv-isa-sim-1057bae0a0d272567189421d22ed6e190c5e30a6.tar.gz riscv-isa-sim-1057bae0a0d272567189421d22ed6e190c5e30a6.tar.bz2 | |
catch trap_illegal_instruction in hwacha
| -rw-r--r-- | hwacha/hwacha.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hwacha/hwacha.cc b/hwacha/hwacha.cc index b1cf7fc..0d6b906 100644 --- a/hwacha/hwacha.cc +++ b/hwacha/hwacha.cc @@ -50,6 +50,10 @@ static reg_t custom(processor_t* p, insn_t insn, reg_t pc) { h->take_exception(HWACHA_CAUSE_VF_FAULT_FETCH, h->get_ct_state()->vf_pc); } + catch (trap_illegal_instruction& t) + { + h->take_exception(HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION, h->get_ct_state()->vf_pc); + } catch (trap_load_address_misaligned& t) { h->take_exception(HWACHA_CAUSE_MISALIGNED_LOAD, t.get_badvaddr()); |