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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-10-18 22:28:23 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-10-18 22:28:23 -0700 |
| commit | 74fe66dcecfa113b39809ca6ca66e1d1645ca1ae (patch) | |
| tree | 74033a64454ca35bba50ee5f5a3f0b997c317851 | |
| parent | e638446bd99d5051b1d5a45dd38dab654b153f6a (diff) | |
| download | riscv-isa-sim-74fe66dcecfa113b39809ca6ca66e1d1645ca1ae.zip riscv-isa-sim-74fe66dcecfa113b39809ca6ca66e1d1645ca1ae.tar.gz riscv-isa-sim-74fe66dcecfa113b39809ca6ca66e1d1645ca1ae.tar.bz2 | |
implement vxcptsave/vxcptrestore
| -rw-r--r-- | hwacha/decode_hwacha.h | 2 | ||||
| -rw-r--r-- | hwacha/decode_hwacha_ut.h | 3 | ||||
| -rw-r--r-- | hwacha/insns/vxcptrestore.h | 39 | ||||
| -rw-r--r-- | hwacha/insns/vxcptsave.h | 41 |
4 files changed, 82 insertions, 3 deletions
diff --git a/hwacha/decode_hwacha.h b/hwacha/decode_hwacha.h index 9353cb9..b7069fa 100644 --- a/hwacha/decode_hwacha.h +++ b/hwacha/decode_hwacha.h @@ -12,11 +12,13 @@ #define NFPR (h->get_ct_state()->nfpr) #define MAXVL (h->get_ct_state()->maxvl) #define VL (h->get_ct_state()->vl) +#define UTIDX (h->get_ct_state()->count) #define VF_PC (h->get_ct_state()->vf_pc) #define WRITE_NXPR(nxprnext) (h->get_ct_state()->nxpr = (nxprnext)) #define WRITE_NFPR(nfprnext) (h->get_ct_state()->nfpr = (nfprnext)) #define WRITE_MAXVL(maxvlnext) (h->get_ct_state()->maxvl = (maxvlnext)) #define WRITE_VL(vlnext) (h->get_ct_state()->vl = (vlnext)) +#define WRITE_UTIDX(value) (h->get_ct_state()->count = (value)) #define WRITE_VF_PC(pcnext) (h->get_ct_state()->vf_pc = (pcnext)) #define INSN_RS1 (insn.rs1()) diff --git a/hwacha/decode_hwacha_ut.h b/hwacha/decode_hwacha_ut.h index 44b993b..a07af82 100644 --- a/hwacha/decode_hwacha_ut.h +++ b/hwacha/decode_hwacha_ut.h @@ -6,9 +6,6 @@ #include "hwacha.h" #include "hwacha_xcpt.h" -#define UTIDX (h->get_ct_state()->count) -#define WRITE_UTIDX(value) (h->get_ct_state()->count = (value)) - #undef RS1 #undef RS2 #undef WRITE_RD diff --git a/hwacha/insns/vxcptrestore.h b/hwacha/insns/vxcptrestore.h index cb3d8f0..db7a62e 100644 --- a/hwacha/insns/vxcptrestore.h +++ b/hwacha/insns/vxcptrestore.h @@ -1 +1,40 @@ require_supervisor_hwacha; +reg_t addr = XS1; + +#define LOAD_B(addr) \ + (addr += 1, p->get_mmu()->load_uint8(addr-1)) + +#define LOAD_W(addr) \ + (addr += 4, p->get_mmu()->load_uint32(addr-4)) + +#define LOAD_D(addr) \ + (addr += 8, p->get_mmu()->load_uint64(addr-8)) + + +WRITE_NXPR(LOAD_W(addr)); +WRITE_NFPR(LOAD_W(addr)); +WRITE_MAXVL(LOAD_W(addr)); +WRITE_VL(LOAD_W(addr)); +WRITE_UTIDX(LOAD_W(addr)); +addr += 4; +WRITE_VF_PC(LOAD_D(addr)); + +for (uint32_t x=1; x<NXPR; x++) { + for (uint32_t i=0; i<VL; i++) { + UT_WRITE_XPR(i, x, LOAD_D(addr)); + } +} + +for (uint32_t f=0; f<NFPR; f++) { + for (uint32_t i=0; i<VL; i++) { + UT_WRITE_FPR(i, f, LOAD_D(addr)); + } +} + +for (uint32_t i=0; i<VL; i++) { + h->get_ut_state(i)->run = LOAD_B(addr); +} + +#undef LOAD_B +#undef LOAD_W +#undef LOAD_D diff --git a/hwacha/insns/vxcptsave.h b/hwacha/insns/vxcptsave.h index cb3d8f0..2ff7761 100644 --- a/hwacha/insns/vxcptsave.h +++ b/hwacha/insns/vxcptsave.h @@ -1 +1,42 @@ require_supervisor_hwacha; +reg_t addr = XS1; + +#define STORE_B(addr, value) \ + p->get_mmu()->store_uint8(addr, value); \ + addr += 1; \ + +#define STORE_W(addr, value) \ + p->get_mmu()->store_uint32(addr, value); \ + addr += 4; \ + +#define STORE_D(addr, value) \ + p->get_mmu()->store_uint64(addr, value); \ + addr += 8; \ + +STORE_W(addr, NXPR); +STORE_W(addr, NFPR); +STORE_W(addr, MAXVL); +STORE_W(addr, VL); +STORE_W(addr, UTIDX); +addr += 4; +STORE_D(addr, VF_PC); + +for (uint32_t x=1; x<NXPR; x++) { + for (uint32_t i=0; i<VL; i++) { + STORE_D(addr, UT_READ_XPR(i, x)); + } +} + +for (uint32_t f=0; f<NFPR; f++) { + for (uint32_t i=0; i<VL; i++) { + STORE_D(addr, UT_READ_FPR(i, f)); + } +} + +for (uint32_t i=0; i<VL; i++) { + STORE_B(addr, h->get_ut_state(i)->run); +} + +#undef STORE_B +#undef STORE_W +#undef STORE_D |