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| author | Jerry Zhao <jerryz123@berkeley.edu> | 2022-12-15 15:29:43 -0800 |
|---|---|---|
| committer | Jerry Zhao <jerryz123@berkeley.edu> | 2022-12-15 17:07:35 -0800 |
| commit | e1919d3b0666a149fbfa0514ba6d6ce40abdfdab (patch) | |
| tree | e190714f44f235412c60edce438997bda318df63 | |
| parent | 3b9a3f17ba14f6844afbb27212405d2bf5019257 (diff) | |
| download | riscv-isa-sim-e1919d3b0666a149fbfa0514ba6d6ce40abdfdab.zip riscv-isa-sim-e1919d3b0666a149fbfa0514ba6d6ce40abdfdab.tar.gz riscv-isa-sim-e1919d3b0666a149fbfa0514ba6d6ce40abdfdab.tar.bz2 | |
Add config.h includes directly to source files instead of relying on header chaining
This step is to ensure that removing config.h out of headers will not cause regressions.
| -rw-r--r-- | fesvr/elfloader.cc | 1 | ||||
| -rw-r--r-- | fesvr/htif.cc | 1 | ||||
| -rw-r--r-- | fesvr/syscall.cc | 1 | ||||
| -rw-r--r-- | riscv/csrs.cc | 1 | ||||
| -rw-r--r-- | riscv/dts.cc | 1 | ||||
| -rw-r--r-- | riscv/execute.cc | 1 | ||||
| -rw-r--r-- | riscv/mmu.cc | 1 | ||||
| -rw-r--r-- | spike_dasm/spike-dasm.cc | 1 | ||||
| -rw-r--r-- | spike_main/spike-log-parser.cc | 1 | ||||
| -rw-r--r-- | spike_main/spike.cc | 1 |
10 files changed, 10 insertions, 0 deletions
diff --git a/fesvr/elfloader.cc b/fesvr/elfloader.cc index 192de65..eef19b4 100644 --- a/fesvr/elfloader.cc +++ b/fesvr/elfloader.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "elf.h" #include "memif.h" #include "byteorder.h" diff --git a/fesvr/htif.cc b/fesvr/htif.cc index 29eb7d8..80ab69b 100644 --- a/fesvr/htif.cc +++ b/fesvr/htif.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "htif.h" #include "rfb.h" #include "elfloader.h" diff --git a/fesvr/syscall.cc b/fesvr/syscall.cc index 19c9f38..875ffb7 100644 --- a/fesvr/syscall.cc +++ b/fesvr/syscall.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "syscall.h" #include "htif.h" #include "byteorder.h" diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 15a17d4..48b3e56 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" // For std::any_of #include <algorithm> diff --git a/riscv/dts.cc b/riscv/dts.cc index e1905ae..4612886 100644 --- a/riscv/dts.cc +++ b/riscv/dts.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "dts.h" #include "libfdt.h" #include "platform.h" diff --git a/riscv/execute.cc b/riscv/execute.cc index 3c627a4..b5e3450 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "processor.h" #include "mmu.h" #include "disasm.h" diff --git a/riscv/mmu.cc b/riscv/mmu.cc index fa873d9..99dd190 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "mmu.h" #include "arith.h" #include "simif.h" diff --git a/spike_dasm/spike-dasm.cc b/spike_dasm/spike-dasm.cc index 62e7212..3e42df5 100644 --- a/spike_dasm/spike-dasm.cc +++ b/spike_dasm/spike-dasm.cc @@ -6,6 +6,7 @@ // enclosed hexadecimal number, interpreted as a RISC-V // instruction. +#include "config.h" #include "disasm.h" #include "extension.h" #include <iostream> diff --git a/spike_main/spike-log-parser.cc b/spike_main/spike-log-parser.cc index e5511e5..adf6b68 100644 --- a/spike_main/spike-log-parser.cc +++ b/spike_main/spike-log-parser.cc @@ -5,6 +5,7 @@ // in its inputs, then output the RISC-V instruction with the disassembly // enclosed hexadecimal number. +#include "config.h" #include <iostream> #include <string> #include <cstdint> diff --git a/spike_main/spike.cc b/spike_main/spike.cc index f183e5b..b204091 100644 --- a/spike_main/spike.cc +++ b/spike_main/spike.cc @@ -1,5 +1,6 @@ // See LICENSE for license details. +#include "config.h" #include "cfg.h" #include "sim.h" #include "mmu.h" |