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author | Jerry Zhao <jerryz123@berkeley.edu> | 2023-06-06 13:03:22 -0700 |
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committer | Jerry Zhao <jerryz123@berkeley.edu> | 2023-06-20 12:23:47 -0700 |
commit | 59e8b9fab6d96acf74f78f6a7db8cc2005d4fa70 (patch) | |
tree | 23e9eafae6e6f15355db5715f5f6531353b637ee | |
parent | d2cfddd1141ba95adcfc9617e7767513f0f47146 (diff) | |
download | riscv-isa-sim-59e8b9fab6d96acf74f78f6a7db8cc2005d4fa70.zip riscv-isa-sim-59e8b9fab6d96acf74f78f6a7db8cc2005d4fa70.tar.gz riscv-isa-sim-59e8b9fab6d96acf74f78f6a7db8cc2005d4fa70.tar.bz2 |
device_t: Add missing overrides to derived abstract_device_t classes
-rw-r--r-- | riscv/devices.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/riscv/devices.h b/riscv/devices.h index 02d9e98..b9f639d 100644 --- a/riscv/devices.h +++ b/riscv/devices.h @@ -17,8 +17,8 @@ class simif_t; class bus_t : public abstract_device_t { public: - bool load(reg_t addr, size_t len, uint8_t* bytes); - bool store(reg_t addr, size_t len, const uint8_t* bytes); + bool load(reg_t addr, size_t len, uint8_t* bytes) override; + bool store(reg_t addr, size_t len, const uint8_t* bytes) override; void add_device(reg_t addr, abstract_device_t* dev); std::pair<reg_t, abstract_device_t*> find_device(reg_t addr); @@ -30,8 +30,8 @@ class bus_t : public abstract_device_t { class rom_device_t : public abstract_device_t { public: rom_device_t(std::vector<char> data); - bool load(reg_t addr, size_t len, uint8_t* bytes); - bool store(reg_t addr, size_t len, const uint8_t* bytes); + bool load(reg_t addr, size_t len, uint8_t* bytes) override; + bool store(reg_t addr, size_t len, const uint8_t* bytes) override; const std::vector<char>& contents() { return data; } private: std::vector<char> data; @@ -43,8 +43,8 @@ class mem_t : public abstract_device_t { mem_t(const mem_t& that) = delete; ~mem_t(); - bool load(reg_t addr, size_t len, uint8_t* bytes) { return load_store(addr, len, bytes, false); } - bool store(reg_t addr, size_t len, const uint8_t* bytes) { return load_store(addr, len, const_cast<uint8_t*>(bytes), true); } + bool load(reg_t addr, size_t len, uint8_t* bytes) override { return load_store(addr, len, bytes, false); } + bool store(reg_t addr, size_t len, const uint8_t* bytes) override { return load_store(addr, len, const_cast<uint8_t*>(bytes), true); } char* contents(reg_t addr); reg_t size() { return sz; } void dump(std::ostream& o); @@ -59,8 +59,8 @@ class mem_t : public abstract_device_t { class clint_t : public abstract_device_t { public: clint_t(simif_t*, uint64_t freq_hz, bool real_time); - bool load(reg_t addr, size_t len, uint8_t* bytes); - bool store(reg_t addr, size_t len, const uint8_t* bytes); + bool load(reg_t addr, size_t len, uint8_t* bytes) override; + bool store(reg_t addr, size_t len, const uint8_t* bytes) override; size_t size() { return CLINT_SIZE; } void increment(reg_t inc); uint64_t get_mtimecmp(reg_t hartid) { return mtimecmp[hartid]; } @@ -98,9 +98,9 @@ struct plic_context_t { class plic_t : public abstract_device_t, public abstract_interrupt_controller_t { public: plic_t(simif_t*, uint32_t ndev); - bool load(reg_t addr, size_t len, uint8_t* bytes); - bool store(reg_t addr, size_t len, const uint8_t* bytes); - void set_interrupt_level(uint32_t id, int lvl); + bool load(reg_t addr, size_t len, uint8_t* bytes) override; + bool store(reg_t addr, size_t len, const uint8_t* bytes) override; + void set_interrupt_level(uint32_t id, int lvl) override; size_t size() { return PLIC_SIZE; } private: std::vector<plic_context_t> contexts; @@ -129,8 +129,8 @@ class ns16550_t : public abstract_device_t { public: ns16550_t(class bus_t *bus, abstract_interrupt_controller_t *intctrl, uint32_t interrupt_id, uint32_t reg_shift, uint32_t reg_io_width); - bool load(reg_t addr, size_t len, uint8_t* bytes); - bool store(reg_t addr, size_t len, const uint8_t* bytes); + bool load(reg_t addr, size_t len, uint8_t* bytes) override; + bool store(reg_t addr, size_t len, const uint8_t* bytes) override; void tick(void); size_t size() { return NS16550_SIZE; } private: |