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| author | 4vtomat <brandon.wu@sifive.com> | 2022-04-09 03:04:04 -0700 |
|---|---|---|
| committer | 4vtomat <brandon.wu@sifive.com> | 2022-04-09 03:04:04 -0700 |
| commit | 4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f (patch) | |
| tree | e4630bd6f7056be5331cd1332c0e9494938510fa | |
| parent | 20cd1dfe3108854a94a12f1367cedbbd71622791 (diff) | |
| download | riscv-isa-sim-4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f.zip riscv-isa-sim-4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f.tar.gz riscv-isa-sim-4e816c5ed8e0a1b0ccb89a78ea020bb147096a5f.tar.bz2 | |
Replaced vector loop compare body with newly defined macro
This commit uses new macro to replace loop compare body to
enhance code reuse.
| -rw-r--r-- | riscv/decode.h | 101 |
1 files changed, 11 insertions, 90 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 7dd86e3..e0d70bf 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -896,113 +896,34 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) } // comparision result to masking register -#define VI_VV_LOOP_CMP(BODY) \ - VI_CHECK_MSS(true); \ +#define VI_LOOP_CMP_BODY(PARAMS, BODY) \ VI_LOOP_CMP_BASE \ - if (sew == e8){ \ - VV_CMP_PARAMS(e8); \ - BODY; \ - }else if(sew == e16){ \ - VV_CMP_PARAMS(e16); \ - BODY; \ - }else if(sew == e32){ \ - VV_CMP_PARAMS(e32); \ - BODY; \ - }else if(sew == e64){ \ - VV_CMP_PARAMS(e64); \ - BODY; \ - } \ + INSNS_BASE(PARAMS, BODY) \ VI_LOOP_CMP_END +#define VI_VV_LOOP_CMP(BODY) \ + VI_CHECK_MSS(true); \ + VI_LOOP_CMP_BODY(VV_CMP_PARAMS, BODY) + #define VI_VX_LOOP_CMP(BODY) \ VI_CHECK_MSS(false); \ - VI_LOOP_CMP_BASE \ - if (sew == e8){ \ - VX_CMP_PARAMS(e8); \ - BODY; \ - }else if(sew == e16){ \ - VX_CMP_PARAMS(e16); \ - BODY; \ - }else if(sew == e32){ \ - VX_CMP_PARAMS(e32); \ - BODY; \ - }else if(sew == e64){ \ - VX_CMP_PARAMS(e64); \ - BODY; \ - } \ - VI_LOOP_CMP_END + VI_LOOP_CMP_BODY(VX_CMP_PARAMS, BODY) #define VI_VI_LOOP_CMP(BODY) \ VI_CHECK_MSS(false); \ - VI_LOOP_CMP_BASE \ - if (sew == e8){ \ - VI_CMP_PARAMS(e8); \ - BODY; \ - }else if(sew == e16){ \ - VI_CMP_PARAMS(e16); \ - BODY; \ - }else if(sew == e32){ \ - VI_CMP_PARAMS(e32); \ - BODY; \ - }else if(sew == e64){ \ - VI_CMP_PARAMS(e64); \ - BODY; \ - } \ - VI_LOOP_CMP_END + VI_LOOP_CMP_BODY(VI_CMP_PARAMS, BODY) #define VI_VV_ULOOP_CMP(BODY) \ VI_CHECK_MSS(true); \ - VI_LOOP_CMP_BASE \ - if (sew == e8){ \ - VV_UCMP_PARAMS(e8); \ - BODY; \ - }else if(sew == e16){ \ - VV_UCMP_PARAMS(e16); \ - BODY; \ - }else if(sew == e32){ \ - VV_UCMP_PARAMS(e32); \ - BODY; \ - }else if(sew == e64){ \ - VV_UCMP_PARAMS(e64); \ - BODY; \ - } \ - VI_LOOP_CMP_END + VI_LOOP_CMP_BODY(VV_UCMP_PARAMS, BODY) #define VI_VX_ULOOP_CMP(BODY) \ VI_CHECK_MSS(false); \ - VI_LOOP_CMP_BASE \ - if (sew == e8){ \ - VX_UCMP_PARAMS(e8); \ - BODY; \ - }else if(sew == e16){ \ - VX_UCMP_PARAMS(e16); \ - BODY; \ - }else if(sew == e32){ \ - VX_UCMP_PARAMS(e32); \ - BODY; \ - }else if(sew == e64){ \ - VX_UCMP_PARAMS(e64); \ - BODY; \ - } \ - VI_LOOP_CMP_END + VI_LOOP_CMP_BODY(VX_UCMP_PARAMS, BODY) #define VI_VI_ULOOP_CMP(BODY) \ VI_CHECK_MSS(false); \ - VI_LOOP_CMP_BASE \ - if (sew == e8){ \ - VI_UCMP_PARAMS(e8); \ - BODY; \ - }else if(sew == e16){ \ - VI_UCMP_PARAMS(e16); \ - BODY; \ - }else if(sew == e32){ \ - VI_UCMP_PARAMS(e32); \ - BODY; \ - }else if(sew == e64){ \ - VI_UCMP_PARAMS(e64); \ - BODY; \ - } \ - VI_LOOP_CMP_END + VI_LOOP_CMP_BODY(VI_UCMP_PARAMS, BODY) // merge and copy loop #define VI_MERGE_VARS \ |