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authordemin.han <demin.han@starfivetech.com>2023-06-08 10:51:31 +0800
committerdemin.han <demin.han@starfivetech.com>2023-06-08 11:42:37 +0800
commitcf7e434c8005fc79f563be98542aa1d42a85f869 (patch)
tree78babec39ae45b1405c72d1a25e16bb99536ac2f
parent97fbfec1c21895ccf0b82f777fba684457fde8fe (diff)
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Replace ternary operator with std:min
-rw-r--r--riscv/vector_unit.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/vector_unit.cc b/riscv/vector_unit.cc
index ff3dd82..9128df6 100644
--- a/riscv/vector_unit.cc
+++ b/riscv/vector_unit.cc
@@ -54,11 +54,11 @@ reg_t vectorUnit_t::vectorUnit_t::set_vl(int rd, int rs1, reg_t reqVL, reg_t new
if (vlmax == 0) {
vl->write_raw(0);
} else if (rd == 0 && rs1 == 0) {
- vl->write_raw(vl->read() > vlmax ? vlmax : vl->read());
+ vl->write_raw(std::min(vl->read(), vlmax));
} else if (rd != 0 && rs1 == 0) {
vl->write_raw(vlmax);
} else if (rs1 != 0) {
- vl->write_raw(reqVL > vlmax ? vlmax : reqVL);
+ vl->write_raw(std::min(reqVL, vlmax));
}
vstart->write_raw(0);