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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2018-05-18 13:45:35 -0700 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-05-18 13:45:35 -0700 |
| commit | 19efe7d1121ab0e1a3014a1554e7340fa958c13f (patch) | |
| tree | 7d1dd13490929e8687f75cea6e8782a2c748c770 | |
| parent | 545911797f15901dd5cc81014db01bb2b0f3f644 (diff) | |
| download | riscv-isa-sim-19efe7d1121ab0e1a3014a1554e7340fa958c13f.zip riscv-isa-sim-19efe7d1121ab0e1a3014a1554e7340fa958c13f.tar.gz riscv-isa-sim-19efe7d1121ab0e1a3014a1554e7340fa958c13f.tar.bz2 | |
Fix install of missed header. (#207)
| -rw-r--r-- | riscv/riscv.mk.in | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 233953f..60c4403 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -25,6 +25,7 @@ riscv_hdrs = \ insn_template.h \ mulhi.h \ debug_module.h \ + debug_rom_defines.h \ remote_bitbang.h \ jtag_dtm.h \ |