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AC_ARG_ENABLE([fpu], AS_HELP_STRING([--disable-fpu], [Disable floating-point]))
AS_IF([test "x$enable_fpu" != "xno"], [
AC_DEFINE([RISCV_ENABLE_FPU],,[Define if floating-point instructions are supported])
])
AC_ARG_ENABLE([64bit], AS_HELP_STRING([--disable-64bit], [Disable 64-bit mode]))
AS_IF([test "x$enable_64bit" != "xno"], [
AC_DEFINE([RISCV_ENABLE_64BIT],,[Define if 64-bit mode is supported])
])
AC_ARG_ENABLE([rvc], AS_HELP_STRING([--enable-rvc], [Enable instruction compression]))
AS_IF([test "x$enable_rvc" = "xyes"], [
AC_DEFINE([RISCV_ENABLE_RVC],,[Define if instruction compression is supported])
])
AC_ARG_ENABLE([vec], AS_HELP_STRING([--disable-vec], [Disable vector processor]))
AS_IF([test "x$enable_vec" != "xno"], [
AC_DEFINE([RISCV_ENABLE_VEC],,[Define if vector processor is supported])
])
AC_ARG_ENABLE([icsim], AS_HELP_STRING([--enable-icsim], [Enable instruction cache simulator]))
AS_IF([test "x$enable_icsim" = "xyes"], [
AC_DEFINE([RISCV_ENABLE_ICSIM],,[Define if instruction cache simulator is enabled])
])
libopc=`dirname \`which riscv-gcc\``/../`$ac_config_guess`/riscv/lib/libopcodes.a
AC_CHECK_FILES([$libopc],[have_libopcodes="yes"],[have_libopcodes="no"])
AC_SEARCH_LIBS([bfd_init],[bfd],[],[have_libopcodes="no"])
AS_IF([test "$have_libopcodes" = "no"],[
AC_MSG_WARN([Could not find opcodes library])
AC_MSG_WARN([Build will not include disassembly support])
],[
LIBS="$libopc $LIBS"
AC_DEFINE([RISCV_HAVE_LIBOPCODES],,[Define if libopcodes exists])
])
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