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AgeCommit message (Expand)AuthorFilesLines
2014-12-04Support 2/4/6/8-byte instructionsAndrew Waterman3-41/+62
2014-12-04Set badvaddr on instruction page faultsAndrew Waterman3-5/+4
2014-12-03Update register names to match new ABIAndrew Waterman1-8/+8
2014-11-30Implement timer faithfullyAndrew Waterman9-56/+86
2014-11-25Factor out the dummy RoCC acceleratorAndrew Waterman5-137/+3
2014-11-22Revert "Enable support for the four custom instructions"Yunsup Lee25-72/+0
2014-11-19Add missing makefile dependenceAndrew Waterman1-1/+2
2014-10-30dummy-rocc-test build fixArun Thomas1-2/+2
2014-10-23Enable support for the four custom instructionsArun Thomas25-0/+72
2014-09-27Avoid some unused variable warningsAndrew Waterman3-15/+20
2014-09-27Avoid use of __int128_tAndrew Waterman10-22/+53
2014-09-20Update riscv.ac to set CPPFLAGS with fesvr include pathArun Thomas1-1/+1
2014-08-25clean up warnings from clangScott Beamer2-3/+1
2014-08-15Added PC histogram option.Christopher Celio5-1/+48
2014-08-07Support uarch counters (degenerately)Andrew Waterman1-0/+17
2014-07-24added support for register convention names in debug modeScott Beamer2-2/+23
2014-07-08Disallow access to FCSR when FP is disabledAndrew Waterman2-17/+24
2014-07-07Use precompiled headers to speed up compilationAndrew Waterman3-7/+10
2014-07-07Minor refactoringAndrew Waterman1-13/+13
2014-06-13Commit log now prints while interrupts are enabled.Christopher Celio2-14/+17
2014-06-13Only print commit log if instruction commitsAndrew Waterman3-5/+21
2014-06-12Set status.u64 to true on bootAndrew Waterman1-1/+1
2014-04-03Merge branch 'tm'Stephen Twigg1-3/+3
2014-04-03Sync encoding in opcodesStephen Twigg1-3/+15
2014-03-18Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETHAndrew Waterman8-11/+29
2014-03-15speed up compilation a bitAndrew Waterman2-2/+2
2014-03-11New FP encodingAndrew Waterman1-42/+42
2014-03-06Add fclass.{s|d} instructionsAndrew Waterman3-0/+10
2014-02-25add extensions to riscv-dis for better disassemblyYunsup Lee1-1/+16
2014-02-14Renumber uarch CSRs into custom CSR spaceAndrew Waterman1-16/+16
2014-02-13Fix I$ simulator not making forward progressAndrew Waterman2-21/+17
2014-02-12Fix commit log when !debugAndrew Waterman1-25/+15
2014-02-10Revert to old AUIPC definitionAndrew Waterman1-1/+1
2014-02-07Clear EVEC LSBs, which kindly prevents a segfaultAndrew Waterman1-2/+2
2014-02-06commit missing definitions for uarch countersYunsup Lee1-0/+56
2014-01-31Fix linking on DarwinAndrew Waterman1-2/+0
2014-01-28Force extension loaders to be linked inAndrew Waterman1-6/+0
2014-01-26Enable runtime loading of dynamic library with --extlibAndrew Waterman1-2/+0
2014-01-26Eliminate hwacha <-> riscv circular dependenceAndrew Waterman6-615/+0
2014-01-25Merge softfloat_riscv into softfloatAndrew Waterman1-1/+0
2014-01-24Require libdl for dynamic linking at runtimeAndrew Waterman1-0/+2
2014-01-24Disassemble amoxorAndrew Waterman1-0/+2
2014-01-24Build and use shared libraries onlyAndrew Waterman1-2/+2
2014-01-24Build and use shared librariesAndrew Waterman1-2/+2
2014-01-24Handle CSR permissions correctlyAndrew Waterman2-6/+10
2014-01-21Use auto-generated trap cause numbersAndrew Waterman2-26/+52
2014-01-20Merge branch 'confprec'Quan Nguyen33-0/+0
2014-01-16Initialize tohost and fromhost to zeroAndrew Waterman1-2/+5
2014-01-13Improve performance for branchy codeAndrew Waterman13-84/+130
2013-12-17Speed things up quite a bitAndrew Waterman6-78/+117