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2022-05-05Factor out P extension macros into their own headerfactor-out-macrosAndrew Waterman2-500/+507
2022-05-05Factor out V extension macros into their own headerAndrew Waterman2-2069/+2076
2022-05-05Merge pull request #983 from soberl/epmp_updates_2Scott Johnson5-13/+130
2022-05-04Update pmpaddr_csr_t::access_ok() for ePMP on matching regionssoberl@nvidia.com1-5/+31
2022-05-04Update mmu_t::pmp_ok() for ePMP in case matching region is not foundsoberl@nvidia.com1-1/+5
2022-05-04Update csr access rules for ePMP on pmpaddr and pmpcfgsoberl@nvidia.com1-7/+31
2022-05-04Implement the new csr mseccfg for ePMP as dummysoberl@nvidia.com4-0/+63
2022-05-04Merge pull request #985 from riscv-software-src/trigger_hitAndrew Waterman2-11/+18
2022-05-04Fix the padding of register names in the log (#987)Shaked Flur1-1/+1
2022-05-02Use MCONTROL_TYPE_MATCH macro instead of 2Tim Newsome1-1/+1
2022-05-02Implement mcontrol trigger hit bit.Tim Newsome2-1/+14
2022-04-22Remove mcontrol_t.hTim Newsome2-4/+1
2022-04-22Remove maskmax as a variable.Tim Newsome2-3/+2
2022-04-22Remove mcontrol_t.type.Tim Newsome2-3/+2
2022-04-22Whitespace fix.Tim Newsome1-1/+0
2022-04-21Pass acutally_store from store_func to misaligned_storeRyan Buchner1-1/+1
2022-04-21Add actually_store tag to misaligned_store functionRyan Buchner1-2/+2
2022-04-21Modify store_func to throw fault if misaligned and require_alignment=trueRyan Buchner1-2/+4
2022-04-21Set require alignment to true on the 'fake' store in amo_func.Ryan Buchner1-1/+1
2022-04-21Add require_alignment tag to store_funcRyan Buchner1-1/+1
2022-04-14Merge pull request #975 from plctlab/plct-code-styleAndrew Waterman5-299/+321
2022-04-14add support for overlap instructionsWeiwei Li4-6/+25
2022-04-14fix style problems in decode.h and processor.ccWeiwei Li2-293/+296
2022-04-13Merge pull request #954 from rswarbrick/more-cfgAndrew Waterman3-28/+29
2022-04-13Adjust indentation in store_slow_path and store_funcRyan Buchner2-18/+18
2022-04-13Skip storing in store_func if actually_store is false, add a fake store at st...Ryan Buchner2-1/+8
2022-04-12Add actually_store tag to store_func and store_slow_pathRyan Buchner2-4/+4
2022-04-12Move real_time_clint into cfg_tRupert Swarbrick3-5/+8
2022-04-12Move varch into cfg_tRupert Swarbrick3-3/+6
2022-04-12Remove nprocs from cfg_tRupert Swarbrick2-5/+3
2022-04-12Move hartids into cfg_tRupert Swarbrick3-7/+11
2022-04-12Move the "default hartids" logic from sim.cc into spike.ccRupert Swarbrick1-10/+3
2022-04-12Move start_pc into cfg_tRupert Swarbrick3-5/+5
2022-04-12Fix debug messages about invalid pmpregions/mmu-typesRupert Swarbrick1-2/+2
2022-04-11Change processor_t to hold a pointer to an isa_parser_t (#973)Rupert Swarbrick3-17/+17
2022-04-11Split mem layout computation in spike.cc (#957)Rupert Swarbrick1-2/+29
2022-04-11Merge pull request #944 from riscv-software-src/triggersScott Johnson10-229/+389
2022-04-11Fix hgatp CSR writeAnup Patel1-1/+1
2022-04-11Merge pull request #968 from 4vtomat/masterAndrew Waterman1-84/+20
2022-04-10Adjust the access index of vs2 to zero in vmv_x_s.h (#969)Brandon Wu1-21/+17
2022-04-09Replaced vector loop compare body with newly defined macro4vtomat1-90/+11
2022-04-09Adding new macro to replace repetitive code4vtomat1-0/+15
2022-04-07Merge pull request #966 from riscv-software-src/fix-riscv-buildAndrew Waterman9-11/+11
2022-04-07Rename processor_t::set_csr to put_csr to fix build on RISC-VAndrew Waterman9-11/+11
2022-04-07Pass ref instead of pointer to trigger_updated()Tim Newsome3-5/+5
2022-04-07Add const to pointers where possible.Tim Newsome2-27/+27
2022-04-07Add module_t::~module_t()Tim Newsome2-0/+9
2022-04-06mmu: support asid/vmid (#928)Chih-Min Chao3-3/+13
2022-04-05Merge pull request #960 from marcfedorow/upstreamAndrew Waterman3-6/+15
2022-04-05Make triggers a vector of trigger_t.Tim Newsome3-3/+3
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